From: Bing Zhao <bingz@nvidia.com>
A new devarg "vport_match" is introduced for the application to use.
If set to 1, then matching using REPRESENTED_PORT items on group 0
will be forced to use "misc.source_port", instead of matching on
the vport metadata in HWS mode. It allows the user to match on the
traffic from E-Switch manager.
A new devarg "vport_match" is introduced for the application to use.
This enables the force matching on "misc.source_port" for item
REPRESENTED_PORT on group 0, instead of matching on the metadata
REG_C_0 bits in HWS mode. It will allow the user to match on the
traffic from E-Switch manager.
By default, this is set to 0. When enable it with 1, the default
FDB jump rule should be disabled by set "fdb_def_rule_en=0".
Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
doc/guides/nics/mlx5.rst | 16 ++++++++++++++++
drivers/net/mlx5/mlx5.c | 17 +++++++++++++++++
drivers/net/mlx5/mlx5.h | 2 ++
drivers/net/mlx5/mlx5_flow_dv.c | 2 +-
drivers/net/mlx5/mlx5_trigger.c | 5 ++++-
5 files changed, 40 insertions(+), 2 deletions(-)
@@ -1369,6 +1369,22 @@ for an additional list of options shared with other mlx5 drivers.
By default, the PMD will set this value to 1.
+- ``vport_match`` parameter [int]
+
+ Controls the underlying matching mechanism for REPRESENTED_PORT items when they are used for
+ flow rules in E-Switch root flow table.
+
+ If set to 1, then ``source_vport`` matching is used. This allows applications to match whole
+ traffic coming from the application by using REPRESENTED_PORT item with ``port_id == UINT16_MAX``.
+ As a side effect, flow rules in root flow table will not be able match physical ports explicitly,
+ when running on Multiport E-Switch.
+ Matching in non-root flow tables (group bigger than 1) is not affected.
+
+ If set to 0, then ``vport_metadata`` matching is used. This is the default mechanism.
+
+ By default, the PMD will set this value to 0. Setting ``vport_match`` to 1 requires that
+ ``fdb_def_rule_en`` is set to 0, so that E-Switch root flow table is exposed to the application.
+
Sub-Function
------------
@@ -184,6 +184,9 @@
/* Device parameter to control representor matching in ingress/egress flows with HWS. */
#define MLX5_REPR_MATCHING_EN "repr_matching_en"
+/* Representor matching field selection: 0 - meta_vport, 1 - misc.vport */
+#define MLX5_HWS_ROOT_VPORT_MATCH "vport_match"
+
/* Shared memory between primary and secondary processes. */
struct mlx5_shared_data *mlx5_shared_data;
@@ -1425,6 +1428,8 @@ mlx5_dev_args_check_handler(const char *key, const char *val, void *opaque)
config->cnt_svc.cycle_time = tmp;
} else if (strcmp(MLX5_REPR_MATCHING_EN, key) == 0) {
config->repr_matching = !!tmp;
+ } else if (strcmp(MLX5_HWS_ROOT_VPORT_MATCH, key) == 0) {
+ config->vport_match = !!tmp;
}
return 0;
}
@@ -1464,6 +1469,7 @@ mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh,
MLX5_HWS_CNT_SERVICE_CORE,
MLX5_HWS_CNT_CYCLE_TIME,
MLX5_REPR_MATCHING_EN,
+ MLX5_HWS_ROOT_VPORT_MATCH,
NULL,
};
int ret = 0;
@@ -1522,6 +1528,11 @@ mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh,
rte_errno = ENODEV;
return -rte_errno;
}
+ if (config->dv_flow_en == 2 && config->fdb_def_rule && config->vport_match) {
+ DRV_LOG(DEBUG, "vport_match=1 is incompatible with FDB default rule "
+ "(fdb_def_rule-en=1). Setting vport_match=0.");
+ config->vport_match = 0;
+ }
if (!config->tx_pp && config->tx_skew &&
!sh->cdev->config.hca_attr.wait_on_time) {
DRV_LOG(WARNING,
@@ -1562,6 +1573,7 @@ mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh,
config->allow_duplicate_pattern);
DRV_LOG(DEBUG, "\"fdb_def_rule_en\" is %u.", config->fdb_def_rule);
DRV_LOG(DEBUG, "\"repr_matching_en\" is %u.", config->repr_matching);
+ DRV_LOG(DEBUG, "\"vport_match\" is %u.", config->vport_match);
return 0;
}
@@ -3003,6 +3015,11 @@ mlx5_probe_again_args_validate(struct mlx5_common_device *cdev,
sh->ibdev_name);
goto error;
}
+ if (sh->config.vport_match ^ config->vport_match) {
+ DRV_LOG(ERR, "\"vport_match\" configuration mismatch for shared %s context.",
+ sh->ibdev_name);
+ goto error;
+ }
mlx5_free(config);
return 0;
error:
@@ -352,6 +352,7 @@ struct mlx5_sh_config {
/* Allow/Prevent the duplicate rules pattern. */
uint32_t fdb_def_rule:1; /* Create FDB default jump rule */
uint32_t repr_matching:1; /* Enable implicit vport matching in HWS FDB. */
+ uint32_t vport_match:1; /* Root table representor matching field selection. */
};
/* Structure for VF VLAN workaround. */
@@ -1782,6 +1783,7 @@ struct mlx5_priv {
uint32_t mark_enabled:1; /* If mark action is enabled on rxqs. */
uint32_t num_lag_ports:4; /* Number of ports can be bonded. */
uint32_t tunnel_enabled:1; /* If tunnel offloading is enabled on rxqs. */
+ uint32_t vport_match:1; /* vport match field. */
uint16_t domain_id; /* Switch domain identifier. */
uint16_t vport_id; /* Associated VF vport index (if any). */
uint32_t vport_meta_tag; /* Used for vport index match ove VF LAG. */
@@ -10594,7 +10594,7 @@ flow_dv_translate_item_represented_port(struct rte_eth_dev *dev, void *key,
* Kernel can use either misc.source_port or half of C0 metadata
* register.
*/
- if (priv->vport_meta_mask) {
+ if (priv->vport_meta_mask && !priv->vport_match) {
/*
* Provide the hint for SW steering library
* to insert the flow into ingress domain and
@@ -1515,7 +1515,10 @@ mlx5_traffic_enable_hws(struct rte_eth_dev *dev)
goto error;
}
} else {
- DRV_LOG(INFO, "port %u FDB default rule is disabled", dev->data->port_id);
+ DRV_LOG(INFO, "port %u FDB default rule is disabled with vport_match %u",
+ dev->data->port_id, config->vport_match);
+ /* vport_match is only interesting in no default FDB rule mode. */
+ priv->vport_match = config->vport_match;
}
if (priv->isolated)
return 0;