From patchwork Thu Nov 2 10:12:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 133747 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E2CC943267; Thu, 2 Nov 2023 02:51:47 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B250B42E11; Thu, 2 Nov 2023 02:51:47 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id 2DE1240A7F; Thu, 2 Nov 2023 02:51:45 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698889905; x=1730425905; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=adrP2xdiErUFJRQw9QWSNXaMSvcxbwJ8vw6871rjzP8=; b=gQ4yygFqnGy1P2bUjn34stEuz5JP1l5EtnwObm6IAPcQsjMexHOaobUB RbbtHWnI/FArT6cc6m8o2YPRD+YoRILiZtrPddEenm0gXKWpxn65on9gc k8fi2/eEdywi4t0sT2hHaGLajdS5or4sHvJ8UlIlQYJ9aCC0VsL5QNZ+z X4jEhVNFOXcRZN36ztBYHQxvX043r4M/j1/peCC6oTUPy2MkujhtM97zZ JjdmbX27Zuxlm+yzYW31ojM1wK6oYDDcKHmQAxoRW/QHG9MV90E3Zx3QS uv9TUyCNAK+KAppR8di74O4oR1vr95/5/pcC5nyELYlZWUQ49Hibryhtq g==; X-IronPort-AV: E=McAfee;i="6600,9927,10881"; a="385794767" X-IronPort-AV: E=Sophos;i="6.03,270,1694761200"; d="scan'208";a="385794767" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2023 18:51:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10881"; a="754637147" X-IronPort-AV: E=Sophos;i="6.03,270,1694761200"; d="scan'208";a="754637147" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.37]) by orsmga007.jf.intel.com with ESMTP; 01 Nov 2023 18:51:42 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , stable@dpdk.org Subject: [PATCH] net/ice: fix Tx Prepareation Date: Thu, 2 Nov 2023 06:12:13 -0400 Message-Id: <20231102101213.1446007-1-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 1. Check nb_segs > 8 for NO TSO case 2. Check nb_segs > Tx ring size for TSO case 3. report nb_mtu_seg_max and nb_seg_max in dev_info. Fixes: 17c7d0f9d6a4 ("net/ice: support basic Rx/Tx") Cc: stable@dpdk.org Signed-off-by: Qi Zhang --- drivers/net/ice/ice_ethdev.c | 2 ++ drivers/net/ice/ice_rxtx.c | 16 +++++++++++++++- drivers/net/ice/ice_rxtx.h | 2 ++ 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 6ef06b9926..3ccba4db80 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -3918,6 +3918,8 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) .nb_max = ICE_MAX_RING_DESC, .nb_min = ICE_MIN_RING_DESC, .nb_align = ICE_ALIGN_RING_DESC, + .nb_mtu_seg_max = ICE_TX_MTU_SEG_MAX, + .nb_seg_max = ICE_MAX_RING_DESC, }; dev_info->speed_capa = RTE_ETH_LINK_SPEED_10M | diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index ee9cb7b955..868ee59933 100644 --- a/drivers/net/ice/ice_rxtx.c +++ b/drivers/net/ice/ice_rxtx.c @@ -3690,9 +3690,23 @@ ice_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts, m = tx_pkts[i]; ol_flags = m->ol_flags; - if (ol_flags & RTE_MBUF_F_TX_TCP_SEG && + if (!(ol_flags & RTE_MBUF_F_TX_TCP_SEG) && + /** + * No TSO case: nb->segs, pkt_len to not exceed + * the limites. + */ + (m->nb_segs > ICE_TX_MTU_SEG_MAX || + m->pkt_len > ICE_FRAME_SIZE_MAX)) { + rte_errno = EINVAL; + return i; + } else if (ol_flags & RTE_MBUF_F_TX_TCP_SEG && + /** TSO case: tso_segsz, nb_segs, pkt_len not exceed + * the limits. + */ (m->tso_segsz < ICE_MIN_TSO_MSS || m->tso_segsz > ICE_MAX_TSO_MSS || + m->nb_segs > + ((struct ice_tx_queue *)tx_queue)->nb_tx_desc || m->pkt_len > ICE_MAX_TSO_FRAME_SIZE)) { /** * MSS outside the range are considered malicious diff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h index 268289716e..bd2c4abec9 100644 --- a/drivers/net/ice/ice_rxtx.h +++ b/drivers/net/ice/ice_rxtx.h @@ -56,6 +56,8 @@ extern int ice_timestamp_dynfield_offset; #define ICE_HEADER_SPLIT_ENA BIT(0) +#define ICE_TX_MTU_SEG_MAX 8 + typedef void (*ice_rx_release_mbufs_t)(struct ice_rx_queue *rxq); typedef void (*ice_tx_release_mbufs_t)(struct ice_tx_queue *txq); typedef void (*ice_rxd_to_pkt_fields_t)(struct ice_rx_queue *rxq,