From patchwork Tue Dec 12 11:32:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135059 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D4C71436D4; Tue, 12 Dec 2023 12:32:52 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DB0A942E23; Tue, 12 Dec 2023 12:32:40 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 5A1BF42E19 for ; Tue, 12 Dec 2023 12:32:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380759; x=1733916759; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=g8AoRPmw883JwOWiGX1kxIQkW/402Y+KXiIlNodi4mM=; b=Ux+UaGJADznrCLYcYNUy5kltjqbfAn3Sl5EBP63tXEBJQfuJDHEbiP90 HHbMHT22AvrC0t1HZ25jw+7cRzRuvdEmQgl8T2CdUmutpSUYwhzd7xzoB mfyvm/cwzMxXrYcSKf89ZCRjk8yuWpPwIGWCs5o3kmsgaQs8BgzOSelYX mhvdAOPTKMs5bfsbNPT/K2fcksU2ETdK6cjoaZ8wOnb55UqfaYr3+J+P5 aRh1dAfAoY6pj+coAOSwDGGqbhbVbUlrCbs5qGaFfwg09RxeaBNeYpYsl sK6EujSiUX5L3jW2VzQkd39P23Hu/nQ7qPDg77nr0cUPoASsqSPrJlgKM Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635858" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635858" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:39 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794700" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794700" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:37 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson , Pavan Nikhilesh , Shijith Thotton Subject: [PATCH v3 3/9] event/cnxk: add schedule-type capability flags Date: Tue, 12 Dec 2023 11:32:17 +0000 Message-Id: <20231212113223.31147-4-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Document explicitly the scheduling types supported by this driver, both via info_get() function, and via table in the documentation. Signed-off-by: Bruce Richardson --- doc/guides/eventdevs/features/cnxk.ini | 3 +++ drivers/event/cnxk/cnxk_eventdev.c | 5 ++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/doc/guides/eventdevs/features/cnxk.ini b/doc/guides/eventdevs/features/cnxk.ini index 5d353e3670..d1516372fa 100644 --- a/doc/guides/eventdevs/features/cnxk.ini +++ b/doc/guides/eventdevs/features/cnxk.ini @@ -4,6 +4,9 @@ ; Refer to default.ini for the full list of available PMD features. ; [Scheduling Features] +atomic_scheduling = Y +ordered_scheduling = Y +parallel_scheduling = Y queue_qos = Y distributed_sched = Y queue_all_types = Y diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c index 0c61f4c20e..e266ee2789 100644 --- a/drivers/event/cnxk/cnxk_eventdev.c +++ b/drivers/event/cnxk/cnxk_eventdev.c @@ -22,7 +22,10 @@ cnxk_sso_info_get(struct cnxk_sso_evdev *dev, dev_info->max_event_port_dequeue_depth = 1; dev_info->max_event_port_enqueue_depth = 1; dev_info->max_num_events = dev->max_num_events; - dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS | + dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_ATOMIC | + RTE_EVENT_DEV_CAP_ORDERED | + RTE_EVENT_DEV_CAP_PARALLEL | + RTE_EVENT_DEV_CAP_QUEUE_QOS | RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED | RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES | RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |