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Thu, 25 Jan 2024 05:31:42 -0800 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Dariusz Sosnowski , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH v2 22/23] net/mlx5: add support for GENEVE VNI modify field Date: Thu, 25 Jan 2024 15:30:42 +0200 Message-ID: <20240125133043.575860-23-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240125133043.575860-1-michaelba@nvidia.com> References: <20231203112543.844014-1-michaelba@nvidia.com> <20240125133043.575860-1-michaelba@nvidia.com> MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3A:EE_|BN9PR12MB5034:EE_ X-MS-Office365-Filtering-Correlation-Id: fb959716-9af6-474d-759f-08dc1da9f962 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: S+PlTOHArNlNzIci8p9Vu8Wf6QlMymrv73fAd+nFUTV3thmVGbGt2TugyuK8tUhSjInuAayQfBQeJBacaLqq9gMZNwB2Q3J8lRUXhs4Ppt+kjr6p+k16eTWtz6uumo5JArkabGBHzkNwKBl4yaykkWmfLa7uMo4ApBr5joogPCmrUecwNKVxj60kvmoXQtgp3VRvDnrvJnbCQcKv60sni4eSTP2a05TA1+5nhP4FdE5KwM/Eig5/jeqrII6iS1u3As9uH+C6ieTXhUUaf/TPK+kNqQPU1uvmL3J1dy5TMzN0CEDESvZv8a7Hv8WKadOruaEfIcSdWbc07pi4KnKtfFY66nY6UHzpgwe0LZQQH+UJ5fuOS1OahbeqL6M2SmhQOBweHDs0xpobGAEiHjSbfnJ5zDcLd3gn4IqJRRGIfYPsrpy90k+cyDO1sED7PX5l15NMvT3XrpE4rUZeDawhQPDL2lpIfUzYd+LZ+qPyl30mcpQ3zfXYXYDnJB0w34qeaR/RdK53LSAsjSVx3k0yQnnCinpNrxVDZSjUOWkvhKwlfXHH19xCew9jtWaMGFmJob6lILaeESfJpoTvq48cef+91+yFa5m0iDh1dsBeC2dM7dCzOpwcqzR5hIgjnpTJbVgX3kif26RBouLYZapnSB+gyfEtOOzXGdFtqYYWSXA+TzqPYHri3JCBpbOQVvRin8RlX1FODtUUcV+JsarAvQYLE3aImnp9l17rcJyT0av9YXV6mIgX//lqFZwpcX8C X-Forefront-Antispam-Report: CIP:216.228.118.232; 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The support is only using HW steering. Signed-off-by: Michael Baum Acked-by: Suanming Mou --- doc/guides/nics/mlx5.rst | 6 +++++- doc/guides/rel_notes/release_24_03.rst | 1 + drivers/net/mlx5/mlx5_flow_dv.c | 4 +--- drivers/net/mlx5/mlx5_flow_hw.c | 12 ++++++++++-- 4 files changed, 17 insertions(+), 6 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index a6d00ecd2b..0e3d0bc099 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -585,8 +585,12 @@ Limitations - Modification of an arbitrary place in a packet via the special ``RTE_FLOW_FIELD_START`` Field ID is not supported. - Modification of the MPLS header is supported only in HWS and only to copy from, the encapsulation level is always 0. - - Modification of the 802.1Q Tag, VXLAN Network or GENEVE Network ID's is not supported. - Modify field action using ``RTE_FLOW_FIELD_RANDOM`` is not supported. + - Modification of the 802.1Q Tag is not supported. + - Modification of VXLAN Network or GENEVE Network ID's is supported only for HW steering. + - Modification of GENEVE Network ID's is not supported when configured + ``FLEX_PARSER_PROFILE_ENABLE`` supports Geneve TLV options. + See :ref:`mlx5_firmware_config` for more flex parser information. - Encapsulation levels are not supported, can modify outermost header fields only. - Offsets cannot skip past the boundary of a field. - If the field type is ``RTE_FLOW_FIELD_MAC_TYPE`` diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index 0c8491ce37..8b14ab8986 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -80,6 +80,7 @@ New Features * Added HW steering support for ``RTE_FLOW_ITEM_TYPE_GENEVE`` flow item. * Added HW steering support for ``RTE_FLOW_ITEM_TYPE_GENEVE_OPT`` flow item. + * Added HW steering support for modify field ``RTE_FLOW_FIELD_GENEVE_VNI`` flow action. Removed Items diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 857813368b..5d5e2cadf6 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1957,6 +1957,7 @@ mlx5_flow_field_id_to_modify_info info[idx].offset = off_be; break; case RTE_FLOW_FIELD_VXLAN_VNI: + case RTE_FLOW_FIELD_GENEVE_VNI: MLX5_ASSERT(data->offset + width <= 24); /* VNI is on bits 31-8 of TUNNEL_HDR_DW_1. */ off_be = 24 - (data->offset + width) + 8; @@ -1967,9 +1968,6 @@ mlx5_flow_field_id_to_modify_info else info[idx].offset = off_be; break; - case RTE_FLOW_FIELD_GENEVE_VNI: - /* not supported yet*/ - break; case RTE_FLOW_FIELD_GTP_TEID: MLX5_ASSERT(data->offset + width <= 32); off_be = 32 - (data->offset + width); diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 00dc9bc890..687d809b1b 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -4990,6 +4990,8 @@ flow_hw_validate_action_modify_field(struct rte_eth_dev *dev, { const struct rte_flow_action_modify_field *action_conf = action->conf; const struct rte_flow_action_modify_field *mask_conf = mask->conf; + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_hca_attr *attr = &priv->sh->cdev->config.hca_attr; int ret; if (!mask_conf) @@ -5089,10 +5091,16 @@ flow_hw_validate_action_modify_field(struct rte_eth_dev *dev, return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifying random value is not supported"); - if (flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_GENEVE_VNI)) + /** + * Geneve VNI modification is supported only when Geneve header is + * parsed natively. When GENEVE options are supported, they both Geneve + * and options headers are parsed as a flex parser. + */ + if (flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_GENEVE_VNI) && + attr->geneve_tlv_opt) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, action, - "modifying Geneve VNI is not supported"); + "modifying Geneve VNI is not supported when GENEVE opt is supported"); /* Due to HW bug, tunnel MPLS header is read only. */ if (action_conf->dst.field == RTE_FLOW_FIELD_MPLS) return rte_flow_error_set(error, EINVAL,