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Thu, 25 Jan 2024 05:31:08 -0800 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Dariusz Sosnowski , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH v2 08/23] common/mlx5: add PRM attribute for TLV sample Date: Thu, 25 Jan 2024 15:30:28 +0200 Message-ID: <20240125133043.575860-9-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240125133043.575860-1-michaelba@nvidia.com> References: <20231203112543.844014-1-michaelba@nvidia.com> <20240125133043.575860-1-michaelba@nvidia.com> MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3E:EE_|SJ0PR12MB6710:EE_ X-MS-Office365-Filtering-Correlation-Id: a7ff877e-d004-447f-b03c-08dc1da9eac1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: y5POk7vF62jL/uFcHqQwYa/dbjK4K1KmfekqUbKPy+SVYfryLutg0KXhURNWtSU5MCeNxJOEjRrKfZA9t/iPtIOoPnGelk8is5Ox+NCSdORv58hnKQkYB5G9KTsZVQudrigQ5yhnS0btQ49GN/SonNhakY8XQQqmumMeJGQMrA3YXq53TG3J4n5hCIGNURBcx4qaolCzd/PKPkPyLdbPPevehV5b/x6l1/XqY9k3kPsv8iUkIY3DSUd3UfcTSQiM/c8hAxo83qsSfG8JCgVm4fdhQAWLbHnSrMK45svDqRDpln4pFSFE4E4ZJtR1OrpM82XZYVx/CS5eHoZsM/NSsUfCI+RTLo6tKji/cEiIcO38peGqPyzo3NVxxNvbjQnwVwNqSPJBA6srkwRnq/pKJ8eQqf0P2hD9iKpsdBHnaN1/iQ6Z60d+GjRvME4g2Hi8VWkXgDiGJ4xojM2QPs9eRIJmdRPA/xbYw2BBjfpfcjkFHT7DMznhjAwvzcmXz2oc0mwYiEre0XHQf8BVa6EZQD7b9hCzeO6TN1955UsWDq59rESDienJ9JNephwUMipIbAzDPwmTNXZUVNeRCLw1gJG+B812A+bpgYuN3kaJPNlX/YsfjR6V1hxgSR6wGob4E9Nahuhqb5ZK+cMOjaR90daOtOM+2QbsiH9Wg+EpuZqQYw40eQNr2h868UdK1neozqUQOkJPWCSd9/h0tdjMwMa7dOMcKK7yl+4WEjUM7ZjROHmD6BVgvzWOYAft5M9X X-Forefront-Antispam-Report: CIP:216.228.118.232; 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New HCA capabilities indicating GENEVE TLV sample is supported. 2. New fields in "mlx5_ifc_geneve_tlv_option_bits" structure. Signed-off-by: Michael Baum Acked-by: Suanming Mou --- drivers/common/mlx5/mlx5_devx_cmds.c | 18 ++++++++++++++++-- drivers/common/mlx5/mlx5_devx_cmds.h | 9 +++++++-- drivers/common/mlx5/mlx5_prm.h | 15 +++++++++++---- 3 files changed, 34 insertions(+), 8 deletions(-) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index c783fc0e10..68137dc535 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -968,6 +968,10 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, max_geneve_tlv_options); attr->max_geneve_tlv_option_data_len = MLX5_GET(cmd_hca_cap, hcattr, max_geneve_tlv_option_data_len); + attr->geneve_tlv_option_offset = MLX5_GET(cmd_hca_cap, hcattr, + geneve_tlv_option_offset); + attr->geneve_tlv_sample = MLX5_GET(cmd_hca_cap, hcattr, + geneve_tlv_sample); attr->query_match_sample_info = MLX5_GET(cmd_hca_cap, hcattr, query_match_sample_info); attr->qos.sup = MLX5_GET(cmd_hca_cap, hcattr, qos); @@ -2886,11 +2890,21 @@ mlx5_devx_cmd_create_geneve_tlv_option(void *ctx, MLX5_CMD_OP_CREATE_GENERAL_OBJECT); MLX5_SET(general_obj_in_cmd_hdr, hdr, obj_type, MLX5_GENERAL_OBJ_TYPE_GENEVE_TLV_OPT); - MLX5_SET(geneve_tlv_option, opt, option_class, - rte_be_to_cpu_16(attr->option_class)); MLX5_SET(geneve_tlv_option, opt, option_type, attr->option_type); MLX5_SET(geneve_tlv_option, opt, option_data_length, attr->option_data_len); + if (attr->option_class_ignore) + MLX5_SET(geneve_tlv_option, opt, option_class_ignore, + attr->option_class_ignore); + else + MLX5_SET(geneve_tlv_option, opt, option_class, + rte_be_to_cpu_16(attr->option_class)); + if (attr->offset_valid) { + MLX5_SET(geneve_tlv_option, opt, sample_offset_valid, + attr->offset_valid); + MLX5_SET(geneve_tlv_option, opt, sample_offset, + attr->sample_offset); + } geneve_tlv_opt_obj->obj = mlx5_glue->devx_obj_create(ctx, in, sizeof(in), out, sizeof(out)); diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h index d11f1d650f..4f264560a9 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.h +++ b/drivers/common/mlx5/mlx5_devx_cmds.h @@ -212,8 +212,10 @@ struct mlx5_hca_attr { uint32_t lro_timer_supported_periods[MLX5_LRO_NUM_SUPP_PERIODS]; uint16_t lro_min_mss_size; uint32_t flex_parser_protocols; - uint32_t max_geneve_tlv_options; - uint32_t max_geneve_tlv_option_data_len; + uint32_t max_geneve_tlv_options:8; + uint32_t max_geneve_tlv_option_data_len:5; + uint32_t geneve_tlv_sample:1; + uint32_t geneve_tlv_option_offset:1; uint32_t hairpin:1; uint32_t log_max_hairpin_queues:5; uint32_t log_max_hairpin_wq_data_sz:5; @@ -675,6 +677,9 @@ struct mlx5_devx_geneve_tlv_option_attr { uint32_t option_class:16; uint32_t option_type:8; uint32_t option_data_len:5; + uint32_t option_class_ignore:1; + uint32_t offset_valid:1; + uint32_t sample_offset:8; }; /* mlx5_devx_cmds.c */ diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 69404b5ed8..f15e3c2bd7 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -1854,7 +1854,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 num_of_uars_per_page[0x20]; u8 flex_parser_protocols[0x20]; u8 max_geneve_tlv_options[0x8]; - u8 reserved_at_568[0x3]; + u8 geneve_tlv_sample[0x1]; + u8 geneve_tlv_option_offset[0x1]; + u8 reserved_at_56a[0x1]; u8 max_geneve_tlv_option_data_len[0x5]; u8 flex_parser_header_modify[0x1]; u8 reserved_at_571[0x2]; @@ -3424,16 +3426,21 @@ struct mlx5_ifc_virtio_q_counters_bits { struct mlx5_ifc_geneve_tlv_option_bits { u8 modify_field_select[0x40]; - u8 reserved_at_40[0x18]; + u8 reserved_at_40[0x8]; + u8 sample_offset[0x8]; + u8 sample_id_valid[0x1]; + u8 sample_offset_valid[0x1]; + u8 option_class_ignore[0x1]; + u8 reserved_at_53[0x5]; u8 geneve_option_fte_index[0x8]; u8 option_class[0x10]; u8 option_type[0x8]; u8 reserved_at_78[0x3]; u8 option_data_length[0x5]; - u8 reserved_at_80[0x180]; + u8 geneve_sample_field_id[0x20]; + u8 reserved_at_a0[0x160]; }; - enum mlx5_ifc_rtc_update_mode { MLX5_IFC_RTC_STE_UPDATE_MODE_BY_HASH = 0x0, MLX5_IFC_RTC_STE_UPDATE_MODE_BY_OFFSET = 0x1,