From patchwork Tue Feb 20 11:04:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 136910 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3CBCF43B53; Tue, 20 Feb 2024 12:05:35 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 314F8427E2; Tue, 20 Feb 2024 12:05:10 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id CECAE427DC; Tue, 20 Feb 2024 12:05:08 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41JMRD2d026189; Tue, 20 Feb 2024 03:05:08 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=zuD0cl3vtrbh/2Ty/hLFkov0+AXooedIooJyxCGwqew=; b=J++ PSr2x0MtG7gk5O1TL2bJWYV8uSOg8BeMIi/xhSSgAlXc6wkxI6WNpJU89rVKqVNZ EhDEydNDHmENX0aR5x1LWFseE4a1fzjrEWRfa7bGjaz18N6r2vsO5zNOEOl3VCt4 HGzX/uyoKuakZDv8tUXOEigy9UO1Q7SDolx6k7VPWry2BnjmAbwa92rbpfkjTWV+ yo0YOIBjjpQcTITmur/L2gyInIN8VlbqwdOZ5S3lW66DfcSZCUWxh+3r83Eq2yTJ QhBgWZVtVQU1THzXBGUHmSeNw/r+EWYvynrDnoLid8iqjqNlVXN6uKbjxDN642Nu 4uOBgJ78I4T7CxHFwPg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3wcfsa1kv2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 20 Feb 2024 03:05:08 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 20 Feb 2024 03:05:06 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 20 Feb 2024 03:05:06 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 0FB353F7094; Tue, 20 Feb 2024 03:05:03 -0800 (PST) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH v2 06/13] net/cnxk: fix issue with buff size compute Date: Tue, 20 Feb 2024 16:34:43 +0530 Message-ID: <20240220110450.2227277-6-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240220110450.2227277-1-ndabilpuram@marvell.com> References: <20240220110450.2227277-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: DYJk5EVaGepqBOGoCktQcnXOCZITb4-X X-Proofpoint-ORIG-GUID: DYJk5EVaGepqBOGoCktQcnXOCZITb4-X X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-20_06,2024-02-20_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In case where cnxk_nix_mtu_set() is called before data->min_rx_buf_size is set, use buf size from first RQ's mempool. Fixes: 34b46320f446 ("net/cnxk: perform early MTU setup for event mode") Cc: stable@dpdk.org Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cnxk_ethdev_ops.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c index e9ab8da781..e816884d47 100644 --- a/drivers/net/cnxk/cnxk_ethdev_ops.c +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c @@ -544,8 +544,9 @@ cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); struct rte_eth_dev_data *data = eth_dev->data; struct roc_nix *nix = &dev->nix; + struct cnxk_eth_rxq_sp *rxq_sp; + uint32_t buffsz = 0; int rc = -EINVAL; - uint32_t buffsz; frame_size += CNXK_NIX_TIMESYNC_RX_OFFSET * dev->ptp_en; @@ -561,8 +562,24 @@ cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) goto exit; } - buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM; - old_frame_size = data->mtu + CNXK_NIX_L2_OVERHEAD; + if (!eth_dev->data->nb_rx_queues) + goto skip_buffsz_check; + + /* Perform buff size check */ + if (data->min_rx_buf_size) { + buffsz = data->min_rx_buf_size; + } else if (eth_dev->data->rx_queues && eth_dev->data->rx_queues[0]) { + rxq_sp = cnxk_eth_rxq_to_sp(data->rx_queues[0]); + + if (rxq_sp->qconf.mp) + buffsz = rte_pktmbuf_data_room_size(rxq_sp->qconf.mp); + } + + /* Skip validation if RQ's are not yet setup */ + if (!buffsz) + goto skip_buffsz_check; + + buffsz -= RTE_PKTMBUF_HEADROOM; /* Refuse MTU that requires the support of scattered packets * when this feature has not been enabled before. @@ -580,6 +597,8 @@ cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) goto exit; } +skip_buffsz_check: + old_frame_size = data->mtu + CNXK_NIX_L2_OVERHEAD; /* if new MTU was smaller than old one, then flush all SQs before MTU change */ if (old_frame_size > frame_size) { if (data->dev_started) {