diff mbox series

[v3,6/7] net/mlx5: support modify IPv6 traffic class field

Message ID 20240226134556.2985054-7-michaelba@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: support copy from inner fields |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Michael Baum Feb. 26, 2024, 1:45 p.m. UTC 
  Add HW steering support for IPv6 traffic class field modification.
Copy from inner IPv6 traffic class field is also supported using
"level=2".

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
 doc/guides/rel_notes/release_24_03.rst |  1 +
 drivers/net/mlx5/mlx5_flow_dv.c        | 11 +++++++++++
 drivers/net/mlx5/mlx5_flow_hw.c        |  3 ++-
 3 files changed, 14 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst
index 0473858e19..c2fc22ed66 100644
--- a/doc/guides/rel_notes/release_24_03.rst
+++ b/doc/guides/rel_notes/release_24_03.rst
@@ -127,6 +127,7 @@  New Features
   * Added support for GENEVE matching and modifying in HWS flow engine.
   * Added support for modifying IPv4 proto field in HWS flow engine.
   * Added support for modifying IPsec ESP fields in HWS flow engine.
+  * Added support for modifying IPv6 traffic class field in HWS flow engine.
   * Added support for matching a random value.
   * Added support for comparing result between packet fields or value.
   * Added support for accumulating value of field into another one.
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index feda003c07..2c0c8e37f7 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -1394,6 +1394,7 @@  mlx5_flow_item_field_width(struct rte_eth_dev *dev,
 		return 32;
 	case RTE_FLOW_FIELD_IPV6_DSCP:
 		return 6;
+	case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS:
 	case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
 	case RTE_FLOW_FIELD_IPV6_PROTO:
 		return 8;
@@ -1795,6 +1796,16 @@  mlx5_flow_field_id_to_modify_info
 		else
 			info[idx].offset = off_be;
 		break;
+	case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS:
+		MLX5_ASSERT(data->offset + width <= 8);
+		off_be = 8 - (data->offset + width);
+		modi_id = CALC_MODI_ID(IPV6_TRAFFIC_CLASS, data->level);
+		info[idx] = (struct field_modify_info){1, 0, modi_id};
+		if (mask)
+			mask[idx] = flow_modify_info_mask_8(width, off_be);
+		else
+			info[idx].offset = off_be;
+		break;
 	case RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN:
 		MLX5_ASSERT(data->offset + width <= 16);
 		off_be = 16 - (data->offset + width);
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index fc1bcdd84e..9d4fdb06c1 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -2878,7 +2878,7 @@  flow_hw_modify_field_construct(struct mlx5_hw_q_job *job,
 		 * bits left. Shift the data left for IPv6 DSCP
 		 */
 		if (field->id == MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS &&
-		    !(mask & MLX5_IPV6_HDR_ECN_MASK))
+		    mhdr_action->dst.field == RTE_FLOW_FIELD_IPV6_DSCP)
 			data <<= MLX5_IPV6_HDR_DSCP_SHIFT;
 		data = (data & mask) >> off_b;
 		job->mhdr_cmd[i++].data1 = rte_cpu_to_be_32(data);
@@ -5067,6 +5067,7 @@  flow_hw_validate_modify_field_level(const struct rte_flow_field_data *data,
 	case RTE_FLOW_FIELD_IPV4_TTL:
 	case RTE_FLOW_FIELD_IPV4_SRC:
 	case RTE_FLOW_FIELD_IPV4_DST:
+	case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS:
 	case RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN:
 	case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
 	case RTE_FLOW_FIELD_IPV6_SRC: