diff mbox series

[6/8] net/i40e: fix outer UDP checksum offload for X710

Message ID 20240405125039.897933-7-david.marchand@redhat.com (mailing list archive)
State Superseded
Delegated to: Thomas Monjalon
Headers
Series Fix outer UDP checksum for Intel nics |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

David Marchand April 5, 2024, 12:49 p.m. UTC 
  According to the X710 datasheet (and confirmed on the field..), X710
devices do not support outer checksum offload.

"""
8.4.4.2 Transmit L3 and L4 Integrity Offload

Tunneling UDP headers and GRE header are not offloaded while the
X710/XXV710/XL710 leaves their checksum field as is.
If a checksum is required, software should provide it as well as the inner
checksum value(s) that are required for the outer checksum.
"""

Fix Tx offload capabilities according to the hardware.

X722 may support such offload by setting I40E_TXD_CTX_QW0_L4T_CS_MASK.

Bugzilla ID: 1406
Fixes: 8cc79a1636cd ("net/i40e: fix forward outer IPv6 VXLAN")
Cc: stable@dpdk.org

Reported-by: Jun Wang <junwang01@cestc.cn>
Signed-off-by: David Marchand <david.marchand@redhat.com>
---
Note: I do not have X722 nic. Please Intel devs, check for both X710 and
X722 series.

---
 .mailmap                       | 1 +
 drivers/net/i40e/i40e_ethdev.c | 6 +++++-
 drivers/net/i40e/i40e_rxtx.c   | 9 +++++++++
 3 files changed, 15 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/.mailmap b/.mailmap
index 3843868716..091766eca7 100644
--- a/.mailmap
+++ b/.mailmap
@@ -719,6 +719,7 @@  Junjie Wan <wanjunjie@bytedance.com>
 Jun Qiu <jun.qiu@jaguarmicro.com>
 Jun W Zhou <junx.w.zhou@intel.com>
 Junxiao Shi <git@mail1.yoursunny.com>
+Jun Wang <junwang01@cestc.cn>
 Jun Yang <jun.yang@nxp.com>
 Junyu Jiang <junyux.jiang@intel.com>
 Juraj Linkeš <juraj.linkes@pantheon.tech>
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 380ce1a720..6535c7c178 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -3862,8 +3862,12 @@  i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 		RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO |
 		RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO |
 		RTE_ETH_TX_OFFLOAD_MULTI_SEGS |
-		RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM |
 		dev_info->tx_queue_offload_capa;
+	if (hw->mac.type == I40E_MAC_X722) {
+		dev_info->tx_offload_capa |=
+			RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM;
+	}
+
 	dev_info->dev_capa =
 		RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
 		RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 5d25ab4d3a..a649911494 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -295,6 +295,15 @@  i40e_parse_tunneling_params(uint64_t ol_flags,
 	 */
 	*cd_tunneling |= (tx_offload.l2_len >> 1) <<
 		I40E_TXD_CTX_QW0_NATLEN_SHIFT;
+
+	/**
+	 * Calculate the tunneling UDP checksum (only supported with X722).
+	 * Shall be set only if L4TUNT = 01b and EIPT is not zero
+	 */
+	if (!(*cd_tunneling & I40E_TXD_CTX_QW0_EXT_IP_MASK) &&
+		(*cd_tunneling & I40E_TXD_CTX_UDP_TUNNELING) &&
+		(ol_flags & RTE_MBUF_F_TX_OUTER_UDP_CKSUM))
+		*cd_tunneling |= I40E_TXD_CTX_QW0_L4T_CS_MASK;
 }
 
 static inline void