Add support for NVIDIA ARM implementer ID

Message ID BYAPR12MB35917DA4CC7AE9F855B21CEAABC69@BYAPR12MB3591.namprd12.prod.outlook.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series Add support for NVIDIA ARM implementer ID |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/Intel-compilation warning apply issues
ci/iol-testing warning apply patch failure

Commit Message

Cliff Burdick May 9, 2022, 6:15 p.m. UTC
  build: added NVIDIA ARM implementer ID

NVIDIA ARM CPUs (Xavier, Grace) use implementer ID 0x4e.
This patch adds initial support for the Xavier chip rather than
compiling using the generic platform.

Signed-off-by: Cliff Burdick cburdick@nvidia.com<mailto:cburdick@nvidia.com>
---
config/arm/meson.build | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)

--
2.17.1
  

Patch

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 8aead74086..91ccbfce2c 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -197,6 +197,23 @@  implementer_hisilicon = {
     }
}

+implementer_nvidia = {
+    'description': 'NVIDIA',
+    'flags': [
+        ['RTE_MACHINE', '"armv8a"'],
+        ['RTE_USE_C11_MEM_MODEL', true],
+        ['RTE_MAX_LCORE', 256],
+        ['RTE_MAX_NUMA_NODES', 4]
+    ],
+    'part_number_config': {
+        '0x4': {
+            'march': 'armv8-a',
+            'march_features': ['crc'],
+            'compiler_options': ['-moutline-atomics']
+        }
+    }
+}
+
implementer_qualcomm = {
     'description': 'Qualcomm',
     'flags': [
@@ -224,6 +241,7 @@  implementers = {
     '0x41': implementer_arm,
     '0x43': implementer_cavium,
     '0x48': implementer_hisilicon,
+    '0x4e': implementer_nvidia,
     '0x50': implementer_ampere,
     '0x51': implementer_qualcomm
}