[V1,1/2] tests/l3fwdacl: modify code to apapt avx512

Message ID 1636970295-178745-1-git-send-email-xiangx.an@intel.com (mailing list archive)
State Changes Requested
Headers
Series [V1,1/2] tests/l3fwdacl: modify code to apapt avx512 |

Commit Message

Xiang An Nov. 15, 2021, 9:58 a.m. UTC
  Whatever the rx_mode is, all use "force-max-simd-bitwidth=0" as default parameter.

Signed-off-by: Xiang An <xiangx.an@intel.com>
---
 tests/TestSuite_l3fwdacl.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Patch

diff --git a/tests/TestSuite_l3fwdacl.py b/tests/TestSuite_l3fwdacl.py
index 65c46b0c..4baae51e 100644
--- a/tests/TestSuite_l3fwdacl.py
+++ b/tests/TestSuite_l3fwdacl.py
@@ -638,7 +638,7 @@  class TestL3fwdacl(TestCase):
         cores = self.get_core_list()
         self.verify(cores is not None, "Insufficient cores for speed testing")
 
-        self.eal_para = self.dut.create_eal_parameters(cores=self.get_core_list())
+        self.eal_para = self.dut.create_eal_parameters(cores=self.get_core_list(), other_eal_param='force-max-simd-bitwidth')
         self.core_mask = utils.create_mask(cores)
         print("Core mask: %s" % self.core_mask)