From patchwork Fri Apr 15 10:12:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yingya Han X-Patchwork-Id: 109746 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E2060A0510; Fri, 15 Apr 2022 12:12:41 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CC2F04067E; Fri, 15 Apr 2022 12:12:41 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 0092B4067C for ; Fri, 15 Apr 2022 12:12:39 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650017560; x=1681553560; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=339zLi9ViBuOcm2/Rjck81cPz8NlfKwcDxJud/Tx7i8=; b=FjXc3ezxoreUWjlKPQOj9iFFELu3i53jOUpxWL8raRSjA82sKqTrxHFW wqRuJrvDhJvDjNx/lmvqBvaYOpKl20YRvUbGbfLM2C20HCnbZ+PCBec2s TMcmy1Okd1nwswZ/oUajr6woloQs4h8dWXpfEDwSBxeHKPpqb/U7VXdmf tfVNOISKjy4UJrn0Dr3QelTB7Z9nZLsE5YzGIJSNItKHqwsOHrwh13LUG cPq8v/vEO3Q45Bw+JR/ysZrlh5HCuSjaEscodRdUEZQ2e7BLWT4z3dJev K6u/3bXDyYuZltr4nnS2Ea9Q+OaUv0F/tGMVyQy4W7lnXVsGA5TyvlCfO Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10317"; a="245018383" X-IronPort-AV: E=Sophos;i="5.90,262,1643702400"; d="scan'208";a="245018383" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Apr 2022 03:12:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,262,1643702400"; d="scan'208";a="527821883" Received: from dpdk-lijuan-icelake2.sh.intel.com ([10.67.118.205]) by orsmga006.jf.intel.com with ESMTP; 15 Apr 2022 03:12:38 -0700 From: hanyingya To: dts@dpdk.org Cc: hanyingya Subject: [dts][PATCH V1]test_plans/nic_single_core_perf: modify test plan to adapt meson build Date: Fri, 15 Apr 2022 10:12:20 +0000 Message-Id: <20220415101220.1905362-1-yingyax.han@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dts@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: test suite reviews and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dts-bounces@dpdk.org Signed-off-by: hanyingya --- test_plans/nic_single_core_perf_test_plan.rst | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/test_plans/nic_single_core_perf_test_plan.rst b/test_plans/nic_single_core_perf_test_plan.rst index 7f86312f..405be401 100644 --- a/test_plans/nic_single_core_perf_test_plan.rst +++ b/test_plans/nic_single_core_perf_test_plan.rst @@ -64,12 +64,11 @@ Prerequisites 4 TG 10g ports for 4 NNT10G ports 4. Case config:: - For FVL40g, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=y" - in ./config/common_base and re-build DPDK. - For CVL25G, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=y" - in ./config/common_base and re-build DPDK. - + if test 16 or 32 Byte Descriptor, please set the value of + "rx_desc_size" to 16 or 32 in dts/conf/nic_single_core_perf.cfg, + and the default value is 16. + Test Case : Single Core Performance Measurement =============================================== 1) Bind tested ports to igb_uio