diff mbox series

[V3,4/4] conf/pvp_vhost_async_virtio_pmd_perf_dsa: add testsuite config file

Message ID 20230216083602.1027072-1-weix.ling@intel.com (mailing list archive)
State Accepted
Headers
Series add pvp_vhost_async_virtio_pmd_perf_dsa |

Checks

Context Check Description
ci/Intel-dts-format-test success Testing OK
ci/Intel-dts-pylama-test success Testing OK
ci/Intel-dts-doc-test success Testing OK
ci/Intel-dts-suite-test warning SKIPPED

Commit Message

Ling, WeiX Feb. 16, 2023, 8:36 a.m. UTC 
Add pvp_vhost_async_virtio_pmd_perf_dsa config file to test pvp 
vhost/virtio-pmd async data-path performance use DSA device 
with dpdk and kernel driver.

Signed-off-by: Wei Ling <weix.ling@intel.com>
---
 conf/pvp_vhost_async_virtio_pmd_perf_dsa.cfg | 223 +++++++++++++++++++
 1 file changed, 223 insertions(+)
 create mode 100644 conf/pvp_vhost_async_virtio_pmd_perf_dsa.cfg
diff mbox series

Patch

diff --git a/conf/pvp_vhost_async_virtio_pmd_perf_dsa.cfg b/conf/pvp_vhost_async_virtio_pmd_perf_dsa.cfg
new file mode 100644
index 00000000..f7b6268b
--- /dev/null
+++ b/conf/pvp_vhost_async_virtio_pmd_perf_dsa.cfg
@@ -0,0 +1,223 @@ 
+[suite]
+update_expected = True
+test_parameters = {64: [2048], 128: [2048], 256: [2048], 512: [2048], 2048: [2048], 1280: [2048], 1518: [2048], 2048: [2048], 4096: [2048]}
+test_duration = 60
+accepted_tolerance = 2
+expected_throughput = {
+	'test_perf_virtio_pmd_split_ring_1c_1q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_1c_2q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_2c_2q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_2c_4q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_4c_4q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000},
+		2048: {2048: 0.000},
+		4096: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_4c_8q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_1c_1q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_1c_2q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_2c_2q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_2c_4q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_4c_4q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_4c_8q_idxd': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_1c_1q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_1c_2q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_2c_2q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_2c_4q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_4c_4q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_split_ring_4c_8q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_1c_1q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_1c_2q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_2c_2q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_2c_4q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_4c_4q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}
+	},
+	'test_perf_virtio_pmd_packed_ring_4c_8q_vfio_pci': {
+		64: {2048: 0.000},
+		128: {2048: 0.000},
+		256: {2048: 0.000},
+		512: {2048: 0.00},
+		2048: {2048: 0.000},
+		1280: {2048: 0.000},
+		1518: {2048: 0.000}},}