From patchwork Wed Jan 6 08:34:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slava Ovsiienko X-Patchwork-Id: 86045 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8E205A09FF; Wed, 6 Jan 2021 09:34:38 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 67A351608CD; Wed, 6 Jan 2021 09:34:36 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 977941608C4 for ; Wed, 6 Jan 2021 09:34:34 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@nvidia.com) with SMTP; 6 Jan 2021 10:34:30 +0200 Received: from nvidia.com (pegasus12.mtr.labs.mlnx [10.210.17.40]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 1068YTv6026551; Wed, 6 Jan 2021 10:34:30 +0200 From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: rasland@nvidia.com, matan@nvidia.com, orika@nvidia.com, thomas@monjalon.net, akozyrev@nvidia.com, stable@dpdk.org Date: Wed, 6 Jan 2021 08:34:22 +0000 Message-Id: <1609922063-13716-2-git-send-email-viacheslavo@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1609922063-13716-1-git-send-email-viacheslavo@nvidia.com> References: <1608311697-31529-1-git-send-email-viacheslavo@nvidia.com> <1609922063-13716-1-git-send-email-viacheslavo@nvidia.com> Subject: [dpdk-dev] [PATCH v2 1/2] net/mlx5: optimize inline mbuf freeing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The mlx5 PMD supports packet data inlining by pushing data to the transmit descriptor. If packet is short enough and all data are inline, the mbuf is not needed for data send anymore and can be freed. The mbuf free was performed in the most inner loop building the transmit descriptors. This patch postpones the mbuf free transaction to the tx_burst routine exit, optimizing the loop and allowing the bulk freeing for the multiple mbufs in single pool API call. Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_rxtx.c | 38 ++++++++++++++++++++++++++++++++++---- drivers/net/mlx5/mlx5_rxtx.h | 1 + 2 files changed, 35 insertions(+), 4 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index 65a1f99..ee56a72 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -1990,6 +1990,17 @@ enum mlx5_txcmp_code { } } } +/* + * No inline version to free buffers for optimal call + * on the tx_burst completion. + */ +static __rte_noinline void +__mlx5_tx_free_mbuf(struct rte_mbuf **__rte_restrict pkts, + unsigned int pkts_n, + unsigned int olx __rte_unused) +{ + mlx5_tx_free_mbuf(pkts, pkts_n, olx); +} /** * Free the mbuf from the elts ring buffer till new tail. @@ -4408,10 +4419,25 @@ enum mlx5_txcmp_code { MLX5_ASSERT(room >= tlen); room -= tlen; /* - * Packet data are completely inlined, - * free the packet immediately. + * Packet data are completely inline, + * we can try to free the packet. + */ + if (likely(loc->pkts_sent == loc->mbuf_free)) { + /* + * All the packets from the burst beginning + * are inline, we can free mbufs directly + * from the origin array on tx_burst exit(). + */ + loc->mbuf_free++; + goto next_mbuf; + } + /* + * In order no to call rte_pktmbuf_free_seg() here, + * in the most inner loop (that might be very + * expensive) we just save the mbuf in elts. */ - rte_pktmbuf_free_seg(loc->mbuf); + txq->elts[txq->elts_head++ & txq->elts_m] = loc->mbuf; + loc->elts_free--; goto next_mbuf; pointer_empw: /* @@ -4433,6 +4459,7 @@ enum mlx5_txcmp_code { mlx5_tx_dseg_ptr(txq, loc, dseg, dptr, dlen, olx); /* We have to store mbuf in elts.*/ txq->elts[txq->elts_head++ & txq->elts_m] = loc->mbuf; + loc->elts_free--; room -= MLX5_WQE_DSEG_SIZE; /* Ring buffer wraparound is checked at the loop end.*/ ++dseg; @@ -4442,7 +4469,6 @@ enum mlx5_txcmp_code { slen += dlen; #endif loc->pkts_sent++; - loc->elts_free--; pkts_n--; if (unlikely(!pkts_n || !loc->elts_free)) { /* @@ -4892,6 +4918,8 @@ enum mlx5_txcmp_code { MLX5_ASSERT(txq->wqe_s >= (uint16_t)(txq->wqe_ci - txq->wqe_pi)); if (unlikely(!pkts_n)) return 0; + if (MLX5_TXOFF_CONFIG(INLINE)) + loc.mbuf_free = 0; loc.pkts_sent = 0; loc.pkts_copy = 0; loc.wqe_last = NULL; @@ -5155,6 +5183,8 @@ enum mlx5_txcmp_code { /* Increment sent packets counter. */ txq->stats.opackets += loc.pkts_sent; #endif + if (MLX5_TXOFF_CONFIG(INLINE) && loc.mbuf_free) + __mlx5_tx_free_mbuf(pkts, loc.mbuf_free, olx); return loc.pkts_sent; } diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index 1e9345a..af47839 100644 --- a/drivers/net/mlx5/mlx5_rxtx.h +++ b/drivers/net/mlx5/mlx5_rxtx.h @@ -217,6 +217,7 @@ struct mlx5_txq_local { uint16_t wqe_free; /* available wqe remain. */ uint16_t mbuf_off; /* data offset in current mbuf. */ uint16_t mbuf_nseg; /* number of remaining mbuf. */ + uint16_t mbuf_free; /* number of inline mbufs to free. */ }; /* TX queue descriptor. */ From patchwork Wed Jan 6 08:34:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slava Ovsiienko X-Patchwork-Id: 86046 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7CEF9A09FF; Wed, 6 Jan 2021 09:34:45 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AED3D1608E0; Wed, 6 Jan 2021 09:34:37 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 9C12B1608CB for ; Wed, 6 Jan 2021 09:34:34 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@nvidia.com) with SMTP; 6 Jan 2021 10:34:31 +0200 Received: from nvidia.com (pegasus12.mtr.labs.mlnx [10.210.17.40]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 1068YTv7026551; Wed, 6 Jan 2021 10:34:30 +0200 From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: rasland@nvidia.com, matan@nvidia.com, orika@nvidia.com, thomas@monjalon.net, akozyrev@nvidia.com Date: Wed, 6 Jan 2021 08:34:23 +0000 Message-Id: <1609922063-13716-3-git-send-email-viacheslavo@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1609922063-13716-1-git-send-email-viacheslavo@nvidia.com> References: <1608311697-31529-1-git-send-email-viacheslavo@nvidia.com> <1609922063-13716-1-git-send-email-viacheslavo@nvidia.com> Subject: [dpdk-dev] [PATCH v2 2/2] net/mlx5: add mbuf fast free offload support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch adds support of the mbuf fast free offload to the transmit datapath. This offload allows to free the mbufs on transmit completion in the most efficient way. It requires the all mbufs were allocated from the same pool, have the reference counter value as 1, and have no any extarnally attached buffers. Signed-off-by: Viacheslav Ovsiienko --- doc/guides/nics/features/mlx5.ini | 1 + doc/guides/nics/mlx5.rst | 12 ++++++++++++ doc/guides/rel_notes/release_21_02.rst | 7 ++++++- drivers/net/mlx5/mlx5_rxtx.c | 35 ++++++++++++++++++++++++++-------- drivers/net/mlx5/mlx5_rxtx.h | 1 + drivers/net/mlx5/mlx5_txq.c | 6 ++++++ 6 files changed, 53 insertions(+), 9 deletions(-) diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini index 54ec95d..72348cd 100644 --- a/doc/guides/nics/features/mlx5.ini +++ b/doc/guides/nics/features/mlx5.ini @@ -9,6 +9,7 @@ Link status = Y Link status event = Y Removal event = Y Rx interrupt = Y +Fast mbuf free = Y Queue start/stop = Y Burst mode info = Y MTU update = Y diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 3bda0f8..dee4404 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -74,6 +74,7 @@ Features - RX VLAN stripping. - TX VLAN insertion. - RX CRC stripping configuration. +- TX mbuf fast free offload. - Promiscuous mode on PF and VF. - Multicast promiscuous mode on PF and VF. - Hardware checksum offloads. @@ -320,6 +321,17 @@ Limitations for some NICs (such as ConnectX-6 Dx, ConnectX-6 Lx, and BlueField-2). The capability bit ``scatter_fcs_w_decap_disable`` shows NIC support. +- TX mbuf fast free: + + - fast free offload assumes the all mbufs being sent are originated from the + same memory pool and there is no any extra references to the mbufs (the + reference counter for each mbuf is equal 1 on tx_burst call). The latter + means there should be no any externally attached buffers in mbufs. It is + an application responsibility to provide the correct mbufs if the fast + free offload is engaged. The mlx5 PMD implicitely produces the mbufs with + externally attached buffers if MPRQ option is enabled, hence, the fast + free offload is neither supported nor advertised if there is MPRQ enabled. + - Sample flow: - Supports ``RTE_FLOW_ACTION_TYPE_SAMPLE`` action only within NIC Rx and E-Switch steering domain. diff --git a/doc/guides/rel_notes/release_21_02.rst b/doc/guides/rel_notes/release_21_02.rst index 638f981..9fa0634 100644 --- a/doc/guides/rel_notes/release_21_02.rst +++ b/doc/guides/rel_notes/release_21_02.rst @@ -27,7 +27,7 @@ New Features .. This section should contain new features added in this release. Sample format: - * **Add a title in the past tense with a full stop.** + * **Added support for the Tx mbuf fast free offload.** Add a short 1-2 sentence description in the past tense. The description should be enough to allow someone scanning @@ -55,6 +55,11 @@ New Features Also, make sure to start the actual text at the margin. ======================================================= +* **Updated Mellanox mlx5 driver.** + + Updated the Mellanox mlx5 driver with new features and improvements, including: + + * Added vectorized Multi-Packet Rx Queue burst. Removed Items ------------- diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index ee56a72..680904e 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -1889,6 +1889,8 @@ enum mlx5_txcmp_code { /** * Free the mbufs from the linear array of pointers. * + * @param txq + * Pointer to Tx queue structure. * @param pkts * Pointer to array of packets to be free. * @param pkts_n @@ -1898,7 +1900,8 @@ enum mlx5_txcmp_code { * compile time and may be used for optimization. */ static __rte_always_inline void -mlx5_tx_free_mbuf(struct rte_mbuf **__rte_restrict pkts, +mlx5_tx_free_mbuf(struct mlx5_txq_data *__rte_restrict txq, + struct rte_mbuf **__rte_restrict pkts, unsigned int pkts_n, unsigned int olx __rte_unused) { @@ -1914,6 +1917,16 @@ enum mlx5_txcmp_code { */ MLX5_ASSERT(pkts); MLX5_ASSERT(pkts_n); + /* + * Free mbufs directly to the pool in bulk + * if fast free offload is engaged + */ + if (!MLX5_TXOFF_CONFIG(MULTI) && txq->fast_free) { + mbuf = *pkts; + pool = mbuf->pool; + rte_mempool_put_bulk(pool, (void *)pkts, pkts_n); + return; + } for (;;) { for (;;) { /* @@ -1995,11 +2008,12 @@ enum mlx5_txcmp_code { * on the tx_burst completion. */ static __rte_noinline void -__mlx5_tx_free_mbuf(struct rte_mbuf **__rte_restrict pkts, +__mlx5_tx_free_mbuf(struct mlx5_txq_data *__rte_restrict txq, + struct rte_mbuf **__rte_restrict pkts, unsigned int pkts_n, unsigned int olx __rte_unused) { - mlx5_tx_free_mbuf(pkts, pkts_n, olx); + mlx5_tx_free_mbuf(txq, pkts, pkts_n, olx); } /** @@ -2033,7 +2047,8 @@ enum mlx5_txcmp_code { part = RTE_MIN(part, n_elts); MLX5_ASSERT(part); MLX5_ASSERT(part <= txq->elts_s); - mlx5_tx_free_mbuf(&txq->elts[txq->elts_tail & txq->elts_m], + mlx5_tx_free_mbuf(txq, + &txq->elts[txq->elts_tail & txq->elts_m], part, olx); txq->elts_tail += part; n_elts -= part; @@ -5184,7 +5199,7 @@ enum mlx5_txcmp_code { txq->stats.opackets += loc.pkts_sent; #endif if (MLX5_TXOFF_CONFIG(INLINE) && loc.mbuf_free) - __mlx5_tx_free_mbuf(pkts, loc.mbuf_free, olx); + __mlx5_tx_free_mbuf(txq, pkts, loc.mbuf_free, olx); return loc.pkts_sent; } @@ -5829,17 +5844,19 @@ enum mlx5_txcmp_code { int mlx5_tx_burst_mode_get(struct rte_eth_dev *dev, - uint16_t tx_queue_id __rte_unused, + uint16_t tx_queue_id, struct rte_eth_burst_mode *mode) { eth_tx_burst_t pkt_burst = dev->tx_pkt_burst; + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_txq_data *txq = (*priv->txqs)[tx_queue_id]; unsigned int i, olx; for (i = 0; i < RTE_DIM(txoff_func); i++) { if (pkt_burst == txoff_func[i].func) { olx = txoff_func[i].olx; snprintf(mode->info, sizeof(mode->info), - "%s%s%s%s%s%s%s%s%s", + "%s%s%s%s%s%s%s%s%s%s", (olx & MLX5_TXOFF_CONFIG_EMPW) ? ((olx & MLX5_TXOFF_CONFIG_MPW) ? "Legacy MPW" : "Enhanced MPW") : "No MPW", @@ -5858,7 +5875,9 @@ enum mlx5_txcmp_code { (olx & MLX5_TXOFF_CONFIG_METADATA) ? " + METADATA" : "", (olx & MLX5_TXOFF_CONFIG_TXPP) ? - " + TXPP" : ""); + " + TXPP" : "", + (txq && txq->fast_free) ? + " + Fast Free" : ""); return 0; } } diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index af47839..b78ca60 100644 --- a/drivers/net/mlx5/mlx5_rxtx.h +++ b/drivers/net/mlx5/mlx5_rxtx.h @@ -251,6 +251,7 @@ struct mlx5_txq_data { uint16_t vlan_en:1; /* VLAN insertion in WQE is supported. */ uint16_t db_nc:1; /* Doorbell mapped to non-cached region. */ uint16_t db_heu:1; /* Doorbell heuristic write barrier. */ + uint16_t fast_free:1; /* mbuf fast free on Tx is enabled. */ uint16_t inlen_send; /* Ordinary send data inline size. */ uint16_t inlen_empw; /* eMPW max packet size to inline. */ uint16_t inlen_mode; /* Minimal data length to inline. */ diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index d96abef..c51c85b 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -123,6 +123,8 @@ DEV_TX_OFFLOAD_GRE_TNL_TSO | DEV_TX_OFFLOAD_GENEVE_TNL_TSO); } + if (!config->mprq.enabled) + offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE; return offloads; } @@ -800,6 +802,10 @@ bool vlan_inline; unsigned int temp; + txq_ctrl->txq.fast_free = + !!((txq_ctrl->txq.offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) && + !(txq_ctrl->txq.offloads & DEV_TX_OFFLOAD_MULTI_SEGS) && + !config->mprq.enabled); if (config->txqs_inline == MLX5_ARG_UNSET) txqs_inline = #if defined(RTE_ARCH_ARM64)