From patchwork Thu Jul 15 08:05:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ruifeng Wang X-Patchwork-Id: 95877 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9EA67A0C4D; Thu, 15 Jul 2021 10:05:27 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2148F40143; Thu, 15 Jul 2021 10:05:27 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id CEDBA40140 for ; Thu, 15 Jul 2021 10:05:25 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 15621D6E; Thu, 15 Jul 2021 01:05:25 -0700 (PDT) Received: from net-arm-n1amp-02.shanghai.arm.com (net-arm-n1amp-02.shanghai.arm.com [10.169.210.110]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 788DA3F774; Thu, 15 Jul 2021 01:05:22 -0700 (PDT) From: Ruifeng Wang To: Lee Daly , Fiona Trahe , Ashish Gupta Cc: dev@dpdk.org, alexeymar@nvidia.com, nd@arm.com, honnappa.nagarahalli@arm.com, Ruifeng Wang Date: Thu, 15 Jul 2021 16:05:02 +0800 Message-Id: <20210715080502.2804934-1-ruifeng.wang@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH] compress/isal: support Arm platform X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Isal compress PMD has build failures on Arm platform. As dependent library ISA-L is supported on Arm platform, support of the PMD is expanded to Arm architecture. Fixed build failure caused by architecture specific code, and made the PMD multi architecture compatible. Bugzilla ID: 755 Signed-off-by: Ruifeng Wang --- doc/guides/rel_notes/release_21_08.rst | 3 +++ drivers/compress/isal/isal_compress_pmd.c | 6 +++++- drivers/compress/isal/isal_compress_pmd_ops.c | 6 ++++++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst index 6a902ef9ac..9e2e1de7fe 100644 --- a/doc/guides/rel_notes/release_21_08.rst +++ b/doc/guides/rel_notes/release_21_08.rst @@ -117,6 +117,9 @@ New Features The experimental PMD power management API now supports managing multiple Ethernet Rx queues per lcore. +* **Updated ISAL compress device PMD.** + + The ISAL compress device PMD now supports Arm platforms. Removed Items ------------- diff --git a/drivers/compress/isal/isal_compress_pmd.c b/drivers/compress/isal/isal_compress_pmd.c index 81b937ee73..b7ba61c434 100644 --- a/drivers/compress/isal/isal_compress_pmd.c +++ b/drivers/compress/isal/isal_compress_pmd.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -146,6 +147,7 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform, break; /* Level 3 or higher requested */ default: +#ifdef RTE_ARCH_X86 /* Check for AVX512, to use ISA-L level 3 */ if (rte_cpu_get_flag_enabled( RTE_CPUFLAG_AVX512F)) { @@ -161,7 +163,9 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform, RTE_COMP_ISAL_LEVEL_THREE; priv_xform->level_buffer_size = ISAL_DEF_LVL3_DEFAULT; - } else { + } else +#endif + { ISAL_PMD_LOG(DEBUG, "Requested ISA-L level" " 3 or above; Level 3 optimized" " for AVX512 & AVX2 only." diff --git a/drivers/compress/isal/isal_compress_pmd_ops.c b/drivers/compress/isal/isal_compress_pmd_ops.c index 7d03749da3..9b42147a0b 100644 --- a/drivers/compress/isal/isal_compress_pmd_ops.c +++ b/drivers/compress/isal/isal_compress_pmd_ops.c @@ -4,6 +4,7 @@ #include #include +#include #include #include @@ -139,6 +140,7 @@ isal_comp_pmd_info_get(struct rte_compressdev *dev __rte_unused, /* Check CPU for supported vector instruction and set * feature_flags */ +#if defined(RTE_ARCH_X86) if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX512; else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) @@ -147,6 +149,10 @@ isal_comp_pmd_info_get(struct rte_compressdev *dev __rte_unused, dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX; else dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_SSE; +#elif defined(RTE_ARCH_ARM) + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON)) + dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_NEON; +#endif } }