From patchwork Wed Sep 8 04:58:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yuying" X-Patchwork-Id: 98258 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3AEB6A0C56; Wed, 8 Sep 2021 07:16:01 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EF89E410EB; Wed, 8 Sep 2021 07:16:00 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 27AD44003E for ; Wed, 8 Sep 2021 07:15:58 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10100"; a="200590105" X-IronPort-AV: E=Sophos;i="5.85,276,1624345200"; d="scan'208";a="200590105" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2021 22:15:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,276,1624345200"; d="scan'208";a="538382050" Received: from dpdk-yyzhang2.sh.intel.com ([10.67.117.158]) by FMSMGA003.fm.intel.com with ESMTP; 07 Sep 2021 22:15:57 -0700 From: Yuying Zhang To: dev@dpdk.org, qi.z.zhang@intel.com Cc: Yuying Zhang Date: Wed, 8 Sep 2021 04:58:27 +0000 Message-Id: <20210908045827.3402519-1-yuying.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210906060005.3152399-1-yuying.zhang@intel.com> References: <20210906060005.3152399-1-yuying.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3] net/ice: refine flow priority support in PF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The usage of priority is converse in pipeline mode and non-pipeline mode. Refine attribute priority support of flow filter in PF driver. When priority is 0, rules are created in switch filter first and FDIR is used as backup. When priority is 1, rules are all created in switch filter. Other filters don't support priority 1. Value 0 denotes higher priority. Signed-off-by: Yuying Zhang Acked-by: Qi Zhang --- v3: * Fix priority issue of FDIR in pipeline mode. Refine the priority validation. v2: * Replace magic number with marco and add comments to explain the calculation. --- drivers/net/ice/ice_acl_filter.c | 5 ++++- drivers/net/ice/ice_fdir_filter.c | 6 +++++- drivers/net/ice/ice_generic_flow.c | 4 ++-- drivers/net/ice/ice_hash.c | 5 ++++- drivers/net/ice/ice_switch_filter.c | 11 +++++++++-- 5 files changed, 24 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c index 0c15a7036c..614bd44e23 100644 --- a/drivers/net/ice/ice_acl_filter.c +++ b/drivers/net/ice/ice_acl_filter.c @@ -904,7 +904,7 @@ ice_acl_parse(struct ice_adapter *ad, uint32_t array_len, const struct rte_flow_item pattern[], const struct rte_flow_action actions[], - uint32_t priority __rte_unused, + uint32_t priority, void **meta, struct rte_flow_error *error) { @@ -914,6 +914,9 @@ ice_acl_parse(struct ice_adapter *ad, uint64_t input_set; int ret; + if (priority >= 1) + return -rte_errno; + memset(filter, 0, sizeof(*filter)); item = ice_search_pattern_match_item(ad, pattern, array, array_len, error); diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c index 7ba65b9b04..af9669fac6 100644 --- a/drivers/net/ice/ice_fdir_filter.c +++ b/drivers/net/ice/ice_fdir_filter.c @@ -2194,7 +2194,7 @@ ice_fdir_parse(struct ice_adapter *ad, uint32_t array_len, const struct rte_flow_item pattern[], const struct rte_flow_action actions[], - uint32_t priority __rte_unused, + uint32_t priority, void **meta, struct rte_flow_error *error) { @@ -2207,6 +2207,10 @@ ice_fdir_parse(struct ice_adapter *ad, memset(filter, 0, sizeof(*filter)); item = ice_search_pattern_match_item(ad, pattern, array, array_len, error); + + if (!ad->devargs.pipe_mode_support && priority >= 1) + return -rte_errno; + if (!item) return -rte_errno; diff --git a/drivers/net/ice/ice_generic_flow.c b/drivers/net/ice/ice_generic_flow.c index c2fa75f165..1d557a05f4 100644 --- a/drivers/net/ice/ice_generic_flow.c +++ b/drivers/net/ice/ice_generic_flow.c @@ -1923,9 +1923,9 @@ ice_register_parser(struct ice_flow_parser *parser, } else { if (parser->engine->type == ICE_FLOW_ENGINE_SWITCH || parser->engine->type == ICE_FLOW_ENGINE_HASH) - TAILQ_INSERT_TAIL(list, parser_node, node); - else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR) TAILQ_INSERT_HEAD(list, parser_node, node); + else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR) + TAILQ_INSERT_TAIL(list, parser_node, node); else if (parser->engine->type == ICE_FLOW_ENGINE_ACL) TAILQ_INSERT_HEAD(list, parser_node, node); else diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c index 54d14dfcdd..175780c9ff 100644 --- a/drivers/net/ice/ice_hash.c +++ b/drivers/net/ice/ice_hash.c @@ -1034,7 +1034,7 @@ ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad, uint32_t array_len, const struct rte_flow_item pattern[], const struct rte_flow_action actions[], - uint32_t priority __rte_unused, + uint32_t priority, void **meta, struct rte_flow_error *error) { @@ -1043,6 +1043,9 @@ ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad, struct ice_rss_meta *rss_meta_ptr; uint64_t phint = ICE_PHINT_NONE; + if (priority >= 1) + return -rte_errno; + rss_meta_ptr = rte_zmalloc(NULL, sizeof(*rss_meta_ptr), 0); if (!rss_meta_ptr) { rte_flow_error_set(error, EINVAL, diff --git a/drivers/net/ice/ice_switch_filter.c b/drivers/net/ice/ice_switch_filter.c index f222cb9cb0..e0243bb9f4 100644 --- a/drivers/net/ice/ice_switch_filter.c +++ b/drivers/net/ice/ice_switch_filter.c @@ -31,6 +31,7 @@ #define ICE_PPP_IPV4_PROTO 0x0021 #define ICE_PPP_IPV6_PROTO 0x0057 #define ICE_IPV4_PROTO_NVGRE 0x002F +#define ICE_SW_PRI_BASE 6 #define ICE_SW_INSET_ETHER ( \ ICE_INSET_DMAC | ICE_INSET_SMAC | ICE_INSET_ETHERTYPE) @@ -1572,7 +1573,10 @@ ice_switch_parse_dcf_action(struct ice_dcf_adapter *ad, rule_info->sw_act.src = rule_info->sw_act.vsi_handle; rule_info->sw_act.flag = ICE_FLTR_RX; rule_info->rx = 1; - rule_info->priority = 6 - priority; + /* 0 denotes lowest priority of recipe and highest priority + * of rte_flow. Change rte_flow priority into recipe priority. + */ + rule_info->priority = ICE_SW_PRI_BASE - priority; return 0; } @@ -1651,7 +1655,10 @@ ice_switch_parse_action(struct ice_pf *pf, rule_info->sw_act.vsi_handle = vsi->idx; rule_info->rx = 1; rule_info->sw_act.src = vsi->idx; - rule_info->priority = priority + 5; + /* 0 denotes lowest priority of recipe and highest priority + * of rte_flow. Change rte_flow priority into recipe priority. + */ + rule_info->priority = ICE_SW_PRI_BASE - priority; return 0;