From patchwork Fri Sep 24 09:57:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alvin Zhang X-Patchwork-Id: 99562 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 92080A0548; Fri, 24 Sep 2021 11:57:48 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 188EA41243; Fri, 24 Sep 2021 11:57:48 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id DE1C740142 for ; Fri, 24 Sep 2021 11:57:46 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10116"; a="204197500" X-IronPort-AV: E=Sophos;i="5.85,319,1624345200"; d="scan'208";a="204197500" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2021 02:57:35 -0700 X-IronPort-AV: E=Sophos;i="5.85,319,1624345200"; d="scan'208";a="535355772" Received: from shwdenpg235.ccr.corp.intel.com ([10.253.106.22]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2021 02:57:33 -0700 From: Alvin Zhang To: qi.z.zhang@intel.com Cc: dev@dpdk.org, Alvin Zhang Date: Fri, 24 Sep 2021 17:57:28 +0800 Message-Id: <20210924095729.7408-1-alvinx.zhang@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210924090904.5412-1-alvinx.zhang@intel.com> References: <20210924090904.5412-1-alvinx.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 1/2] common/iavf: enable hash calculation based on IPv4 checksum X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add IPv4 header checksum field selector, it can be used in creating FDIR or RSS rules related to IPv4 header checksum. Signed-off-by: Alvin Zhang Acked-by: Qi Zhang --- v2: rebase to dpdk-next-net-intel --- drivers/common/iavf/virtchnl.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h index 83f51d8..067f715 100644 --- a/drivers/common/iavf/virtchnl.h +++ b/drivers/common/iavf/virtchnl.h @@ -1571,6 +1571,7 @@ enum virtchnl_proto_hdr_field { VIRTCHNL_PROTO_HDR_IPV4_DSCP, VIRTCHNL_PROTO_HDR_IPV4_TTL, VIRTCHNL_PROTO_HDR_IPV4_PROT, + VIRTCHNL_PROTO_HDR_IPV4_CHKSUM, /* IPV6 */ VIRTCHNL_PROTO_HDR_IPV6_SRC = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6), From patchwork Fri Sep 24 09:57:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alvin Zhang X-Patchwork-Id: 99563 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D97E3A0548; Fri, 24 Sep 2021 11:57:52 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0D3EE412F4; Fri, 24 Sep 2021 11:57:52 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 82F9940142 for ; Fri, 24 Sep 2021 11:57:47 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10116"; a="204197506" X-IronPort-AV: E=Sophos;i="5.85,319,1624345200"; d="scan'208";a="204197506" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2021 02:57:36 -0700 X-IronPort-AV: E=Sophos;i="5.85,319,1624345200"; d="scan'208";a="535355778" Received: from shwdenpg235.ccr.corp.intel.com ([10.253.106.22]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2021 02:57:35 -0700 From: Alvin Zhang To: qi.z.zhang@intel.com Cc: dev@dpdk.org, Alvin Zhang Date: Fri, 24 Sep 2021 17:57:29 +0800 Message-Id: <20210924095729.7408-2-alvinx.zhang@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210924095729.7408-1-alvinx.zhang@intel.com> References: <20210924090904.5412-1-alvinx.zhang@intel.com> <20210924095729.7408-1-alvinx.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 2/2] net/iavf: support IPv4/L4 checksum RSS offload X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add supports for RSS_IPV4_CHKSUM & RSS_L4_CHKSUM RSS offload types in RSS flow. Signed-off-by: Alvin Zhang Acked-by: Qi Zhang --- v2: rebase to dpdk-next-net-intel v3: add release note --- doc/guides/rel_notes/release_21_11.rst | 4 ++++ drivers/net/iavf/iavf_hash.c | 38 +++++++++++++++++++++++++++------- 2 files changed, 35 insertions(+), 7 deletions(-) diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst index eeb1e3d..dcff939 100644 --- a/doc/guides/rel_notes/release_21_11.rst +++ b/doc/guides/rel_notes/release_21_11.rst @@ -73,6 +73,10 @@ New Features * Implement support for tunnel offload. * Updated HWRM API to version 1.10.2.44 +* **Updated Intel iavf driver.** + + * Added IPv4 and L4(TCP/UDP/SCTP) checksum hash support in RSS flow. + * **Updated Intel ice driver.** * Added 1PPS out support by a devargs. diff --git a/drivers/net/iavf/iavf_hash.c b/drivers/net/iavf/iavf_hash.c index 03dae5d..01b8c08 100644 --- a/drivers/net/iavf/iavf_hash.c +++ b/drivers/net/iavf/iavf_hash.c @@ -342,23 +342,30 @@ struct virtchnl_proto_hdrs ipv4_ecpri_tmplt = { /* IPv4 outer */ #define IAVF_RSS_TYPE_OUTER_IPV4 (ETH_RSS_ETH | ETH_RSS_IPV4 | \ - ETH_RSS_FRAG_IPV4) + ETH_RSS_FRAG_IPV4 | \ + ETH_RSS_IPV4_CHKSUM) #define IAVF_RSS_TYPE_OUTER_IPV4_UDP (IAVF_RSS_TYPE_OUTER_IPV4 | \ - ETH_RSS_NONFRAG_IPV4_UDP) + ETH_RSS_NONFRAG_IPV4_UDP | \ + ETH_RSS_L4_CHKSUM) #define IAVF_RSS_TYPE_OUTER_IPV4_TCP (IAVF_RSS_TYPE_OUTER_IPV4 | \ - ETH_RSS_NONFRAG_IPV4_TCP) + ETH_RSS_NONFRAG_IPV4_TCP | \ + ETH_RSS_L4_CHKSUM) #define IAVF_RSS_TYPE_OUTER_IPV4_SCTP (IAVF_RSS_TYPE_OUTER_IPV4 | \ - ETH_RSS_NONFRAG_IPV4_SCTP) + ETH_RSS_NONFRAG_IPV4_SCTP | \ + ETH_RSS_L4_CHKSUM) /* IPv6 outer */ #define IAVF_RSS_TYPE_OUTER_IPV6 (ETH_RSS_ETH | ETH_RSS_IPV6) #define IAVF_RSS_TYPE_OUTER_IPV6_FRAG (IAVF_RSS_TYPE_OUTER_IPV6 | \ ETH_RSS_FRAG_IPV6) #define IAVF_RSS_TYPE_OUTER_IPV6_UDP (IAVF_RSS_TYPE_OUTER_IPV6 | \ - ETH_RSS_NONFRAG_IPV6_UDP) + ETH_RSS_NONFRAG_IPV6_UDP | \ + ETH_RSS_L4_CHKSUM) #define IAVF_RSS_TYPE_OUTER_IPV6_TCP (IAVF_RSS_TYPE_OUTER_IPV6 | \ - ETH_RSS_NONFRAG_IPV6_TCP) + ETH_RSS_NONFRAG_IPV6_TCP | \ + ETH_RSS_L4_CHKSUM) #define IAVF_RSS_TYPE_OUTER_IPV6_SCTP (IAVF_RSS_TYPE_OUTER_IPV6 | \ - ETH_RSS_NONFRAG_IPV6_SCTP) + ETH_RSS_NONFRAG_IPV6_SCTP | \ + ETH_RSS_L4_CHKSUM) /* VLAN IPV4 */ #define IAVF_RSS_TYPE_VLAN_IPV4 (IAVF_RSS_TYPE_OUTER_IPV4 | \ ETH_RSS_S_VLAN | ETH_RSS_C_VLAN) @@ -800,6 +807,10 @@ struct virtchnl_proto_hdrs ipv4_ecpri_tmplt = { } else { hdr->field_selector = 0; } + + if (rss_type & ETH_RSS_IPV4_CHKSUM) + REFINE_PROTO_FLD(ADD, IPV4_CHKSUM); + break; case VIRTCHNL_PROTO_HDR_IPV4_FRAG: if (rss_type & @@ -812,6 +823,10 @@ struct virtchnl_proto_hdrs ipv4_ecpri_tmplt = { } else { hdr->field_selector = 0; } + + if (rss_type & ETH_RSS_IPV4_CHKSUM) + REFINE_PROTO_FLD(ADD, IPV4_CHKSUM); + break; case VIRTCHNL_PROTO_HDR_IPV6: if (rss_type & @@ -863,6 +878,9 @@ struct virtchnl_proto_hdrs ipv4_ecpri_tmplt = { } else { hdr->field_selector = 0; } + + if (rss_type & ETH_RSS_L4_CHKSUM) + REFINE_PROTO_FLD(ADD, UDP_CHKSUM); break; case VIRTCHNL_PROTO_HDR_TCP: if (rss_type & @@ -879,6 +897,9 @@ struct virtchnl_proto_hdrs ipv4_ecpri_tmplt = { } else { hdr->field_selector = 0; } + + if (rss_type & ETH_RSS_L4_CHKSUM) + REFINE_PROTO_FLD(ADD, TCP_CHKSUM); break; case VIRTCHNL_PROTO_HDR_SCTP: if (rss_type & @@ -895,6 +916,9 @@ struct virtchnl_proto_hdrs ipv4_ecpri_tmplt = { } else { hdr->field_selector = 0; } + + if (rss_type & ETH_RSS_L4_CHKSUM) + REFINE_PROTO_FLD(ADD, SCTP_CHKSUM); break; case VIRTCHNL_PROTO_HDR_S_VLAN: if (!(rss_type & ETH_RSS_S_VLAN))