From patchwork Tue Nov 2 05:58:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rakesh Kudurumalla X-Patchwork-Id: 103425 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1A920A0C4E; Tue, 2 Nov 2021 06:59:16 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 30BB24069F; Tue, 2 Nov 2021 06:59:15 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 55D2A4068F for ; Tue, 2 Nov 2021 06:59:13 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1A25eJbp012452; Mon, 1 Nov 2021 22:59:03 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=UA7cEHD9O2YZsIpWwz2UnKnxPYfzesV+2Wc9GXK7Gvc=; b=kSaJae7KVy70HCU928AMTSgEC5ajfsSWUoDnJqblaAMIIWUmh2Jo+pf1ovSJd88Lz9Yy Ri32WMo/F5BxfqXBpeyAzOk1BgBS1rfBhGA1PLo6UZSba08KJKdT7fNOZhr7HHXpbufc pxBugllJvmpD/nrOCFXRoEfoLmXwki2CiTC7heLOWVwgmEBDMSAQZKq0rWPW2M7MC72v 7XXWfE5hmFfygIycAIOjCg/0C1R7sHmBYesE2IhVbBEHh2x1nqVybYwnPBUtm2vO7x1e n8OeqeTKYq1RpF03dgiloYrqEZfIJ+gwx8sEsDBJWp53LF62fNQVxJepE0znw261AQcL 1Q== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3c2ycv82af-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 01 Nov 2021 22:59:03 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 1 Nov 2021 22:59:01 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 1 Nov 2021 22:59:01 -0700 Received: from localhost.localdomain (unknown [10.28.48.103]) by maili.marvell.com (Postfix) with ESMTP id B5AB53F706C; Mon, 1 Nov 2021 22:58:57 -0700 (PDT) From: Rakesh Kudurumalla To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao , Ray Kinsella CC: , Rakesh Kudurumalla Date: Tue, 2 Nov 2021 11:28:01 +0530 Message-ID: <20211102055802.1801583-1-rkudurumalla@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-GUID: 0yjZXt838pohlWnOPAg0uihTAirYAL9Q X-Proofpoint-ORIG-GUID: 0yjZXt838pohlWnOPAg0uihTAirYAL9Q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-02_01,2021-11-01_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 1/2] common/cnxk: change policer timeuint to configured value X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Ingress meter rate is calculated based on hardcoded policer timeunit. Patch adds mbox interface to retrieve configured policer timeunit Signed-off-by: Rakesh Kudurumalla --- drivers/common/cnxk/hw/nix.h | 12 ++--- drivers/common/cnxk/roc_mbox.h | 31 +++++++++++++ drivers/common/cnxk/roc_nix.h | 4 ++ drivers/common/cnxk/roc_nix_bpf.c | 76 +++++++++++++++++++++++-------- drivers/common/cnxk/roc_npc.c | 1 + drivers/common/cnxk/version.map | 1 + 6 files changed, 99 insertions(+), 26 deletions(-) diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h index b9e65c942f..dd2ebecc6a 100644 --- a/drivers/common/cnxk/hw/nix.h +++ b/drivers/common/cnxk/hw/nix.h @@ -2115,10 +2115,10 @@ struct nix_lso_format { /** NIX policer rate limits */ #define NIX_BPF_MAX_RATE_DIV_EXP 12 -#define NIX_BPF_MAX_RATE_EXPONENT 0xf +#define NIX_BPF_MAX_RATE_EXPONENT 0x16 #define NIX_BPF_MAX_RATE_MANTISSA 0xff -#define NIX_BPF_RATE_CONST 2000000ULL +#define NIX_BPF_RATE_CONST 8000000000ULL /* NIX rate calculation in Bits/Sec * PIR_ADD = ((256 + NIX_*_PIR[RATE_MANTISSA]) @@ -2129,14 +2129,14 @@ struct nix_lso_format { * << NIX_*_CIR[RATE_EXPONENT]) / 256 * CIR = (2E6 * CIR_ADD / (CCLK_TICKS << NIX_*_CIR[RATE_DIVIDER_EXPONENT])) */ -#define NIX_BPF_RATE(exponent, mantissa, div_exp) \ +#define NIX_BPF_RATE(policer_timeunit, exponent, mantissa, div_exp) \ ((NIX_BPF_RATE_CONST * ((256 + (mantissa)) << (exponent))) / \ - (((1ull << (div_exp)) * 256))) + (((1ull << (div_exp)) * 256 * policer_timeunit))) /* Meter rate limits in Bits/Sec */ -#define NIX_BPF_RATE_MIN NIX_BPF_RATE(0, 0, NIX_BPF_MAX_RATE_DIV_EXP) +#define NIX_BPF_RATE_MIN NIX_BPF_RATE(1000000000, 0, 0, 0) #define NIX_BPF_RATE_MAX \ - NIX_BPF_RATE(NIX_BPF_MAX_RATE_EXPONENT, NIX_BPF_MAX_RATE_MANTISSA, 0) + NIX_BPF_RATE(1, NIX_BPF_MAX_RATE_EXPONENT, NIX_BPF_MAX_RATE_MANTISSA, 0) #define NIX_BPF_DEFAULT_ADJUST_MANTISSA 511 #define NIX_BPF_DEFAULT_ADJUST_EXPONENT 0 diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h index 22f6ebcd92..b63fe108c9 100644 --- a/drivers/common/cnxk/roc_mbox.h +++ b/drivers/common/cnxk/roc_mbox.h @@ -131,6 +131,8 @@ struct mbox_msghdr { M(TIM_ENABLE_RING, 0x803, tim_enable_ring, tim_ring_req, \ tim_enable_rsp) \ M(TIM_DISABLE_RING, 0x804, tim_disable_ring, tim_ring_req, msg_rsp) \ + M(TIM_GET_MIN_INTVL, 0x805, tim_get_min_intvl, tim_intvl_req, \ + tim_intvl_rsp) \ /* CPT mbox IDs (range 0xA00 - 0xBFF) */ \ M(CPT_LF_ALLOC, 0xA00, cpt_lf_alloc, cpt_lf_alloc_req_msg, msg_rsp) \ M(CPT_LF_FREE, 0xA01, cpt_lf_free, msg_req, msg_rsp) \ @@ -143,6 +145,7 @@ struct mbox_msghdr { M(CPT_STATS, 0xA05, cpt_sts_get, cpt_sts_req, cpt_sts_rsp) \ M(CPT_RXC_TIME_CFG, 0xA06, cpt_rxc_time_cfg, cpt_rxc_time_cfg_req, \ msg_rsp) \ + M(CPT_CTX_CACHE_SYNC, 0xA07, cpt_ctx_cache_sync, msg_req, msg_rsp) \ M(CPT_RX_INLINE_LF_CFG, 0xBFE, cpt_rx_inline_lf_cfg, \ cpt_rx_inline_lf_cfg_msg, msg_rsp) \ M(CPT_GET_CAPS, 0xBFD, cpt_caps_get, msg_req, cpt_caps_rsp_msg) \ @@ -238,6 +241,12 @@ struct mbox_msghdr { M(NIX_BANDPROF_ALLOC, 0x801d, nix_bandprof_alloc, \ nix_bandprof_alloc_req, nix_bandprof_alloc_rsp) \ M(NIX_BANDPROF_FREE, 0x801e, nix_bandprof_free, nix_bandprof_free_req, \ + msg_rsp) \ + M(NIX_BANDPROF_GET_HWINFO, 0x801f, nix_bandprof_get_hwinfo, msg_req, \ + nix_bandprof_get_hwinfo_rsp) \ + M(NIX_CPT_BP_ENABLE, 0x8020, nix_cpt_bp_enable, nix_bp_cfg_req, \ + nix_bp_cfg_rsp) \ + M(NIX_CPT_BP_DISABLE, 0x8021, nix_cpt_bp_disable, nix_bp_cfg_req, \ msg_rsp) /* Messages initiated by AF (range 0xC00 - 0xDFF) */ @@ -1070,6 +1079,7 @@ struct nix_rx_cfg { struct mbox_msghdr hdr; #define NIX_RX_OL3_VERIFY BIT(0) #define NIX_RX_OL4_VERIFY BIT(1) +#define NIX_RX_DROP_RE BIT(2) uint8_t __io len_verify; /* Outer L3/L4 len check */ #define NIX_RX_CSUM_OL4_VERIFY BIT(0) uint8_t __io csum_verify; /* Outer L4 checksum verification */ @@ -1172,6 +1182,12 @@ struct nix_bandprof_free_req { uint16_t __io prof_idx[NIX_RX_BAND_PROF_LAYER_MAX][BANDPROF_PER_PFFUNC]; }; +struct nix_bandprof_get_hwinfo_rsp { + struct mbox_msghdr hdr; + uint16_t __io prof_count[NIX_RX_BAND_PROF_LAYER_MAX]; + uint32_t __io policer_timeunit; +}; + /* SSO mailbox error codes * Range 501 - 600. */ @@ -1798,6 +1814,9 @@ struct tim_config_req { uint32_t __io chunksize; uint32_t __io interval; uint8_t __io gpioedge; + uint8_t __io rsvd[7]; + uint64_t __io intervalns; + uint64_t __io clockfreq; }; struct tim_lf_alloc_rsp { @@ -1811,6 +1830,18 @@ struct tim_enable_rsp { uint32_t __io currentbucket; }; +struct tim_intvl_req { + struct mbox_msghdr hdr; + uint8_t __io clocksource; + uint64_t __io clockfreq; +}; + +struct tim_intvl_rsp { + struct mbox_msghdr hdr; + uint64_t __io intvl_cyc; + uint64_t __io intvl_ns; +}; + struct sdp_node_info { /* Node to which this PF belons to */ uint8_t __io node_id; diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 343bb2f8b7..4d68a03aa2 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -11,6 +11,7 @@ #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF #define ROC_NIX_BPF_LEVEL_MAX 3 #define ROC_NIX_BPF_STATS_MAX 12 +#define ROC_NIX_MTR_ID_INVALID UINT32_MAX enum roc_nix_rss_reta_sz { ROC_NIX_RSS_RETA_SZ_64 = 64, @@ -618,6 +619,9 @@ bool __roc_api roc_nix_tm_is_user_hierarchy_enabled(struct roc_nix *nix); int __roc_api roc_nix_tm_tree_type_get(struct roc_nix *nix); /* Ingress Policer API */ +int __roc_api roc_nix_bpf_timeunit_get(struct roc_nix *roc_nix, + uint32_t *time_unit); + int __roc_api roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask, uint16_t count[ROC_NIX_BPF_LEVEL_MAX] /* Out */); diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c index df57958683..6996a54be0 100644 --- a/drivers/common/cnxk/roc_nix_bpf.c +++ b/drivers/common/cnxk/roc_nix_bpf.c @@ -35,15 +35,16 @@ get_mbox(struct roc_nix *roc_nix) static inline uint64_t meter_rate_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p, - uint64_t *div_exp_p) + uint64_t *div_exp_p, uint32_t timeunit_p) { uint64_t div_exp, exponent, mantissa; + uint32_t time_us = timeunit_p; /* Boundary checks */ if (value < NIX_BPF_RATE_MIN || value > NIX_BPF_RATE_MAX) return 0; - if (value <= NIX_BPF_RATE(0, 0, 0)) { + if (value <= NIX_BPF_RATE(time_us, 0, 0, 0)) { /* Calculate rate div_exp and mantissa using * the following formula: * @@ -93,7 +94,7 @@ meter_rate_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p, *mantissa_p = mantissa; /* Calculate real rate value */ - return NIX_BPF_RATE(exponent, mantissa, div_exp); + return NIX_BPF_RATE(time_us, exponent, mantissa, div_exp); } static inline uint64_t @@ -337,14 +338,41 @@ roc_nix_bpf_stats_to_idx(enum roc_nix_bpf_stats level_f) return idx; } +int +roc_nix_bpf_timeunit_get(struct roc_nix *roc_nix, uint32_t *time_unit) +{ + struct nix_bandprof_get_hwinfo_rsp *rsp; + struct mbox *mbox = get_mbox(roc_nix); + struct msg_req *req; + int rc = -ENOSPC; + + if (roc_model_is_cn9k()) + return NIX_ERR_HW_NOTSUP; + + req = mbox_alloc_msg_nix_bandprof_get_hwinfo(mbox); + if (req == NULL) + goto exit; + + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + goto exit; + + *time_unit = rsp->policer_timeunit; + +exit: + return rc; +} + int roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask, uint16_t count[ROC_NIX_BPF_LEVEL_MAX]) { uint8_t mask = lvl_mask & NIX_BPF_LEVEL_F_MASK; + struct nix_bandprof_get_hwinfo_rsp *rsp; + struct mbox *mbox = get_mbox(roc_nix); uint8_t leaf_idx, mid_idx, top_idx; - - PLT_SET_USED(roc_nix); + struct msg_req *req; + int rc = -ENOSPC; if (roc_model_is_cn9k()) return NIX_ERR_HW_NOTSUP; @@ -352,27 +380,29 @@ roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask, if (!mask) return NIX_ERR_PARAM; - /* Currently No MBOX interface is available to get number - * of bandwidth profiles. So numbers per level are hard coded, - * considering 3 RPM blocks and each block has 4 LMAC's. - * So total 12 physical interfaces are in system. Each interface - * supports following bandwidth profiles. - */ + req = mbox_alloc_msg_nix_bandprof_get_hwinfo(mbox); + if (req == NULL) + goto exit; + + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + goto exit; leaf_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_LEAF); mid_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_MID); top_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_TOP); if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) - count[leaf_idx] = NIX_MAX_BPF_COUNT_LEAF_LAYER; + count[leaf_idx] = rsp->prof_count[sw_to_hw_lvl_map[leaf_idx]]; if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) - count[mid_idx] = NIX_MAX_BPF_COUNT_MID_LAYER; + count[mid_idx] = rsp->prof_count[sw_to_hw_lvl_map[mid_idx]]; if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) - count[top_idx] = NIX_MAX_BPF_COUNT_TOP_LAYER; + count[top_idx] = rsp->prof_count[sw_to_hw_lvl_map[top_idx]]; - return 0; +exit: + return rc; } int @@ -514,7 +544,9 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id, uint64_t exponent_p = 0, mantissa_p = 0, div_exp_p = 0; struct mbox *mbox = get_mbox(roc_nix); struct nix_cn10k_aq_enq_req *aq; + uint32_t policer_timeunit; uint8_t level_idx; + int rc; if (roc_model_is_cn9k()) return NIX_ERR_HW_NOTSUP; @@ -522,6 +554,10 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id, if (!cfg) return NIX_ERR_PARAM; + rc = roc_nix_bpf_timeunit_get(roc_nix, &policer_timeunit); + if (rc) + return rc; + level_idx = roc_nix_bpf_level_to_idx(lvl_flag); if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID) return NIX_ERR_PARAM; @@ -544,7 +580,7 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id, switch (cfg->alg) { case ROC_NIX_BPF_ALGO_2697: meter_rate_to_nix(cfg->algo2697.cir, &exponent_p, &mantissa_p, - &div_exp_p); + &div_exp_p, policer_timeunit); aq->prof.cir_mantissa = mantissa_p; aq->prof.cir_exponent = exponent_p; @@ -566,12 +602,12 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id, case ROC_NIX_BPF_ALGO_2698: meter_rate_to_nix(cfg->algo2698.cir, &exponent_p, &mantissa_p, - &div_exp_p); + &div_exp_p, policer_timeunit); aq->prof.cir_mantissa = mantissa_p; aq->prof.cir_exponent = exponent_p; meter_rate_to_nix(cfg->algo2698.pir, &exponent_p, &mantissa_p, - &div_exp_p); + &div_exp_p, policer_timeunit); aq->prof.peir_mantissa = mantissa_p; aq->prof.peir_exponent = exponent_p; @@ -595,12 +631,12 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id, case ROC_NIX_BPF_ALGO_4115: meter_rate_to_nix(cfg->algo4115.cir, &exponent_p, &mantissa_p, - &div_exp_p); + &div_exp_p, policer_timeunit); aq->prof.cir_mantissa = mantissa_p; aq->prof.cir_exponent = exponent_p; meter_rate_to_nix(cfg->algo4115.eir, &exponent_p, &mantissa_p, - &div_exp_p); + &div_exp_p, policer_timeunit); aq->prof.peir_mantissa = mantissa_p; aq->prof.peir_exponent = exponent_p; diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c index 0a7966b52e..503c74748f 100644 --- a/drivers/common/cnxk/roc_npc.c +++ b/drivers/common/cnxk/roc_npc.c @@ -307,6 +307,7 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr, /* Initialize actions */ flow->ctr_id = NPC_COUNTER_NONE; + flow->mtr_id = ROC_NIX_MTR_ID_INVALID; pf_func = npc->pf_func; for (; actions->type != ROC_NPC_ACTION_TYPE_END; actions++) { diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index bf47b33b3e..1f97fad89f 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -97,6 +97,7 @@ INTERNAL { roc_nix_bpf_stats_read; roc_nix_bpf_stats_reset; roc_nix_bpf_stats_to_idx; + roc_nix_bpf_timeunit_get; roc_nix_cq_dump; roc_nix_cq_fini; roc_nix_cq_init; From patchwork Tue Nov 2 05:58:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rakesh Kudurumalla X-Patchwork-Id: 103426 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 83633A0C4E; Tue, 2 Nov 2021 06:59:22 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 727F4410FF; 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Mon, 01 Nov 2021 22:59:20 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 1 Nov 2021 22:59:18 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 1 Nov 2021 22:59:19 -0700 Received: from localhost.localdomain (unknown [10.28.48.103]) by maili.marvell.com (Postfix) with ESMTP id 35F4C3F70B7; Mon, 1 Nov 2021 22:59:14 -0700 (PDT) From: Rakesh Kudurumalla To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Rakesh Kudurumalla Date: Tue, 2 Nov 2021 11:28:02 +0530 Message-ID: <20211102055802.1801583-2-rkudurumalla@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211102055802.1801583-1-rkudurumalla@marvell.com> References: <20211102055802.1801583-1-rkudurumalla@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: IxG5vLTKq9iNDD8Y0oRWlPRG_DQ17TUd X-Proofpoint-GUID: IxG5vLTKq9iNDD8Y0oRWlPRG_DQ17TUd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-02_01,2021-11-01_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 2/2] net/cnxk: integrate bpfcount get MBOX interface X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Bpf count is updated in meter capabilities during device initialization using mbox interface Signed-off-by: Rakesh Kudurumalla Acked-by: Jerin Jacob --- drivers/net/cnxk/cn10k_rte_flow.c | 2 +- drivers/net/cnxk/cnxk_ethdev.c | 4 ++- drivers/net/cnxk/cnxk_ethdev.h | 1 + drivers/net/cnxk/cnxk_ethdev_mtr.c | 39 ++++++++++++++++++++++++------ 4 files changed, 37 insertions(+), 9 deletions(-) diff --git a/drivers/net/cnxk/cn10k_rte_flow.c b/drivers/net/cnxk/cn10k_rte_flow.c index dff4c7746c..b830abe63e 100644 --- a/drivers/net/cnxk/cn10k_rte_flow.c +++ b/drivers/net/cnxk/cn10k_rte_flow.c @@ -249,7 +249,7 @@ cn10k_flow_destroy(struct rte_eth_dev *eth_dev, struct rte_flow *rte_flow, mtr_id = flow->mtr_id; rc = cnxk_flow_destroy(eth_dev, flow, error); - if (!rc) { + if (!rc && mtr_id != ROC_NIX_MTR_ID_INVALID) { rc = cn10k_mtr_destroy(eth_dev, mtr_id); if (rc) { rte_flow_error_set(error, ENXIO, diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index db54468dbc..a7d9978d70 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -730,11 +730,13 @@ nix_free_queue_mem(struct cnxk_eth_dev *dev) static int nix_ingress_policer_setup(struct cnxk_eth_dev *dev) { + struct rte_eth_dev *eth_dev = dev->eth_dev; + TAILQ_INIT(&dev->mtr_profiles); TAILQ_INIT(&dev->mtr_policy); TAILQ_INIT(&dev->mtr); - return 0; + return nix_mtr_capabilities_init(eth_dev); } static int diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 7e4939f0b9..d7c4b3e319 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -590,6 +590,7 @@ struct cnxk_meter_node *nix_get_mtr(struct rte_eth_dev *eth_dev, uint32_t cur_id); int nix_mtr_level_update(struct rte_eth_dev *eth_dev, uint32_t id, uint32_t level); +int nix_mtr_capabilities_init(struct rte_eth_dev *eth_dev); int nix_mtr_configure(struct rte_eth_dev *eth_dev, uint32_t id); int nix_mtr_connect(struct rte_eth_dev *eth_dev, uint32_t id); int nix_mtr_destroy(struct rte_eth_dev *eth_dev, uint32_t id, diff --git a/drivers/net/cnxk/cnxk_ethdev_mtr.c b/drivers/net/cnxk/cnxk_ethdev_mtr.c index 22c85336d9..39d8563826 100644 --- a/drivers/net/cnxk/cnxk_ethdev_mtr.c +++ b/drivers/net/cnxk/cnxk_ethdev_mtr.c @@ -28,7 +28,6 @@ static const enum roc_nix_bpf_level_flag lvl_map[] = {ROC_NIX_BPF_LEVEL_F_LEAF, ROC_NIX_BPF_LEVEL_F_TOP}; static struct rte_mtr_capabilities mtr_capa = { - .n_max = NIX_MTR_COUNT_MAX, .n_shared_max = NIX_MTR_COUNT_PER_FLOW, /* .identical = , */ .shared_identical = true, @@ -36,11 +35,7 @@ static struct rte_mtr_capabilities mtr_capa = { .chaining_n_mtrs_per_flow_max = NIX_MTR_COUNT_PER_FLOW, .chaining_use_prev_mtr_color_supported = true, .chaining_use_prev_mtr_color_enforced = true, - .meter_srtcm_rfc2697_n_max = NIX_MTR_COUNT_MAX, - .meter_trtcm_rfc2698_n_max = NIX_MTR_COUNT_MAX, - .meter_trtcm_rfc4115_n_max = NIX_MTR_COUNT_MAX, .meter_rate_max = NIX_BPF_RATE_MAX / 8, /* Bytes per second */ - .meter_policy_n_max = NIX_MTR_COUNT_MAX, .color_aware_srtcm_rfc2697_supported = true, .color_aware_trtcm_rfc2698_supported = true, .color_aware_trtcm_rfc4115_supported = true, @@ -185,12 +180,33 @@ cnxk_nix_mtr_capabilities_get(struct rte_eth_dev *dev, struct rte_mtr_capabilities *capa, struct rte_mtr_error *error) { + struct cnxk_eth_dev *eth_dev = cnxk_eth_pmd_priv(dev); + uint16_t count[ROC_NIX_BPF_LEVEL_MAX] = {0}; + uint8_t lvl_mask = ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID | + ROC_NIX_BPF_LEVEL_F_TOP; + struct roc_nix *nix = ð_dev->nix; + int rc; + int i; + RTE_SET_USED(dev); if (!capa) return -rte_mtr_error_set(error, EINVAL, - RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL, - "NULL input parameter"); + RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL, + "NULL input parameter"); + + rc = roc_nix_bpf_count_get(nix, lvl_mask, count); + if (rc) + return rc; + + for (i = 0; i < ROC_NIX_BPF_LEVEL_MAX; i++) + mtr_capa.n_max += count[i]; + + mtr_capa.meter_srtcm_rfc2697_n_max = mtr_capa.n_max; + mtr_capa.meter_trtcm_rfc2698_n_max = mtr_capa.n_max; + mtr_capa.meter_trtcm_rfc4115_n_max = mtr_capa.n_max; + mtr_capa.meter_policy_n_max = mtr_capa.n_max; + *capa = mtr_capa; return 0; } @@ -1339,3 +1355,12 @@ nix_mtr_color_action_validate(struct rte_eth_dev *eth_dev, uint32_t id, return 0; } + +int +nix_mtr_capabilities_init(struct rte_eth_dev *eth_dev) +{ + struct rte_mtr_capabilities capa; + struct rte_mtr_error error; + + return cnxk_nix_mtr_capabilities_get(eth_dev, &capa, &error); +}