From patchwork Fri Nov 12 08:03:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiale, SongX" X-Patchwork-Id: 104232 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3D0A0A0548; Fri, 12 Nov 2021 09:03:22 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1812240692; Fri, 12 Nov 2021 09:03:22 +0100 (CET) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 10ADF40687 for ; Fri, 12 Nov 2021 09:03:20 +0100 (CET) X-IronPort-AV: E=McAfee;i="6200,9189,10165"; a="319298282" X-IronPort-AV: E=Sophos;i="5.87,228,1631602800"; d="scan'208";a="319298282" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2021 00:03:19 -0800 X-IronPort-AV: E=Sophos;i="5.87,228,1631602800"; d="scan'208";a="452988907" Received: from unknown (HELO dpdk-zhaohy-t.sh.intel.com) ([10.240.183.68]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2021 00:03:18 -0800 From: Jiale Song To: dts@dpdk.org Cc: Jiale Song Subject: [dts] [PATCH V1] tests/cvl_fdir: add mark id Date: Fri, 12 Nov 2021 16:03:03 +0800 Message-Id: <1636704183-158693-1-git-send-email-songx.jiale@intel.com> X-Mailer: git-send-email 1.8.3.1 X-BeenThere: dts@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: test suite reviews and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dts-bounces@dpdk.org after the packet comes in, it hits the switch rule first and then the fdir rule. the final action is the superposition of the two. the priority of switch is higher than fdir, so it goes to the switch queue, but it still contains the fdir mark action Signed-off-by: Jiale Song --- test_plans/cvl_fdir_test_plan.rst | 4 ++-- tests/TestSuite_cvl_fdir.py | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/test_plans/cvl_fdir_test_plan.rst b/test_plans/cvl_fdir_test_plan.rst index 4c4526d8..ed1214f9 100644 --- a/test_plans/cvl_fdir_test_plan.rst +++ b/test_plans/cvl_fdir_test_plan.rst @@ -3589,7 +3589,7 @@ set "--log-level=ice,7", then check:: sendp([Ether(dst="00:11:22:33:44:55")/IP(src="192.168.0.20",dst="192.168.0.21") /UDP(sport=22, dport=23)/ Raw('x' * 80)],iface="enp175s0f0", count=10) the two packets are both redirected to queue 1 with mark ID 1. - then create MAC_IPV4_UDP flow, it is set to switch filter:: + then create MAC_IPV4_UDP flow, it is set to switch filter with mark ID 1:: flow create 0 ingress pattern eth / ipv4 dst is 192.168.0.21 / udp src is 22 dst is 23 / end actions queue index 2 / end @@ -3610,7 +3610,7 @@ set "--log-level=ice,7", then check:: flow create 0 ingress pattern eth / ipv4 dst is 192.168.0.21 / end actions queue index 1 / end - send same packet, it is redirected to queue 1, because the packet match switch filter first. + send same packet, it is redirected to queue 1 with mark ID 1, because the packet match switch filter first. Test case: count/query diff --git a/tests/TestSuite_cvl_fdir.py b/tests/TestSuite_cvl_fdir.py index d4cb90ce..529be0e8 100644 --- a/tests/TestSuite_cvl_fdir.py +++ b/tests/TestSuite_cvl_fdir.py @@ -3007,7 +3007,7 @@ class TestCVLFdir(TestCase): out = self.send_pkts_getouput(pkts=pkts[0]) rfc.check_mark(out, pkt_num=1, check_param={"port_id": 0, "queue": 1,"mark_id":1}, stats=True) out = self.send_pkts_getouput(pkts=pkts[1]) - rfc.check_mark(out, pkt_num=1, check_param={"port_id": 0, "queue": 2}, stats=True) + rfc.check_mark(out, pkt_num=1, check_param={"port_id": 0, "queue": 2,"mark_id":1}, stats=True) rule3 = "flow create 0 ingress pattern eth / ipv4 dst is 192.168.0.21 / udp src is 22 dst is 23 / end actions queue index 2 / mark id 1 / end" rule4 = "flow create 0 ingress pattern eth / ipv4 dst is 192.168.0.21 / end actions queue index 1 / end"