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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT023.mail.protection.outlook.com (10.13.173.96) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4734.22 via Frontend Transport; Thu, 25 Nov 2021 06:17:18 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 25 Nov 2021 06:17:16 +0000 From: To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko , Michael Baum , Subject: [PATCH] net/mlx5: fix devargs validation for multiclass probe Date: Thu, 25 Nov 2021 08:16:55 +0200 Message-ID: <20211125061655.3143135-1-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 51cf8625-a871-4523-c302-08d9afdb3bda X-MS-TrafficTypeDiagnostic: DM6PR12MB2905: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:245; 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CAT:NONE; SFS:(4636009)(46966006)(36840700001)(316002)(5660300002)(2616005)(16526019)(186003)(6666004)(4326008)(54906003)(83380400001)(1076003)(55016003)(36860700001)(450100002)(7636003)(6916009)(336012)(36756003)(47076005)(86362001)(426003)(7696005)(2906002)(26005)(8676002)(8936002)(508600001)(82310400004)(2876002)(356005)(70586007)(70206006)(6286002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Nov 2021 06:17:18.5297 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 51cf8625-a871-4523-c302-08d9afdb3bda X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB2905 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Michael Baum The mlx5_args function reads the devargs and checks if they are valid for this driver and if not it returns an error. This was normal behavior as long as all the devargs come to this driver, but since it is possible to run several drivers together, the function may return an error for another driver's devarg even though it is completely valid. In addition the function does not allow the user to know which of the devargs he sent is incorrect, but returns an error without printing the unknown devarg. This patch eliminates the error return in the case of an unknown devarg, and prints a warning for each such devarg specifically. Fixes: 7b4f1e6bd367 ("common/mlx5: introduce common library") Cc: stable@dpdk.org Signed-off-by: Michael Baum Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5.c | 68 ++++++----------------------------------- 1 file changed, 9 insertions(+), 59 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 4e04817d11..aa5f313c1a 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -1975,9 +1975,9 @@ mlx5_args_check(const char *key, const char *val, void *opaque) config->std_delay_drop = !!(tmp & MLX5_DELAY_DROP_STANDARD); config->hp_delay_drop = !!(tmp & MLX5_DELAY_DROP_HAIRPIN); } else { - DRV_LOG(WARNING, "%s: unknown parameter", key); - rte_errno = EINVAL; - return -rte_errno; + DRV_LOG(WARNING, + "%s: unknown parameter, maybe it's for another class.", + key); } return 0; } @@ -1996,75 +1996,25 @@ mlx5_args_check(const char *key, const char *val, void *opaque) int mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs) { - const char **params = (const char *[]){ - MLX5_DRIVER_KEY, - MLX5_RXQ_CQE_COMP_EN, - MLX5_RXQ_PKT_PAD_EN, - MLX5_RX_MPRQ_EN, - MLX5_RX_MPRQ_LOG_STRIDE_NUM, - MLX5_RX_MPRQ_LOG_STRIDE_SIZE, - MLX5_RX_MPRQ_MAX_MEMCPY_LEN, - MLX5_RXQS_MIN_MPRQ, - MLX5_TXQ_INLINE, - MLX5_TXQ_INLINE_MIN, - MLX5_TXQ_INLINE_MAX, - MLX5_TXQ_INLINE_MPW, - MLX5_TXQS_MIN_INLINE, - MLX5_TXQS_MAX_VEC, - MLX5_TXQ_MPW_EN, - MLX5_TXQ_MPW_HDR_DSEG_EN, - MLX5_TXQ_MAX_INLINE_LEN, - MLX5_TX_DB_NC, - MLX5_TX_PP, - MLX5_TX_SKEW, - MLX5_TX_VEC_EN, - MLX5_RX_VEC_EN, - MLX5_L3_VXLAN_EN, - MLX5_VF_NL_EN, - MLX5_DV_ESW_EN, - MLX5_DV_FLOW_EN, - MLX5_DV_XMETA_EN, - MLX5_LACP_BY_USER, - MLX5_MR_EXT_MEMSEG_EN, - MLX5_REPRESENTOR, - MLX5_MAX_DUMP_FILES_NUM, - MLX5_LRO_TIMEOUT_USEC, - RTE_DEVARGS_KEY_CLASS, - MLX5_HP_BUF_SIZE, - MLX5_RECLAIM_MEM, - MLX5_SYS_MEM_EN, - MLX5_DECAP_EN, - MLX5_ALLOW_DUPLICATE_PATTERN, - MLX5_MR_MEMPOOL_REG_EN, - MLX5_DELAY_DROP, - NULL, - }; struct rte_kvargs *kvlist; int ret = 0; - int i; if (devargs == NULL) return 0; /* Following UGLY cast is done to pass checkpatch. */ - kvlist = rte_kvargs_parse(devargs->args, params); + kvlist = rte_kvargs_parse(devargs->args, NULL); if (kvlist == NULL) { rte_errno = EINVAL; return -rte_errno; } /* Process parameters. */ - for (i = 0; (params[i] != NULL); ++i) { - if (rte_kvargs_count(kvlist, params[i])) { - ret = rte_kvargs_process(kvlist, params[i], - mlx5_args_check, config); - if (ret) { - rte_errno = EINVAL; - rte_kvargs_free(kvlist); - return -rte_errno; - } - } + ret = rte_kvargs_process(kvlist, NULL, mlx5_args_check, config); + if (ret) { + rte_errno = EINVAL; + ret = -rte_errno; } rte_kvargs_free(kvlist); - return 0; + return ret; } /**