From patchwork Wed Mar 30 08:43:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Bhansali X-Patchwork-Id: 109020 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 40D1BA0509; Wed, 30 Mar 2022 10:44:13 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F3DC140685; Wed, 30 Mar 2022 10:44:12 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id B626E4013F for ; Wed, 30 Mar 2022 10:44:10 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 22U3h0o1016534 for ; Wed, 30 Mar 2022 01:44:09 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=JOI8qZLL5xJIwb1fGzaD/MXSLHwBt85L0tonnKFZlHI=; b=AfNFUj1RezUwYq61/vAf9BxTuA9wY9K5cqQELXCqK7n/LYOimq9K6qDknl5SNsCKSNc3 hWXcTb3iJqvr/iPBP9whCGQcCC3paJGD6lrBtbqOcHBoaS8cC5WXvAwXvRzu6C+UjRau kB9mQMFCU44V+Uf1nkVe9tkr/FoAGTQDvFB/Z00ApRK11VTZ+8DKFl3U4wrmZSvDzOkl AupSoEFcapnaFDsVYpTn39FvCmIqZz70dRzANXiwiAfmE4Knvsy8doI1f8jVOCNESBDF gpjMMGI9LG3SvWaVdaNOgKN1BCZ36c1Fo7qZ2u368yojbfoNOmWWnHiphbK/pL/KOLKE DA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3f475c3897-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 30 Mar 2022 01:44:09 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 30 Mar 2022 01:44:07 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 30 Mar 2022 01:44:07 -0700 Received: from localhost.localdomain (unknown [10.28.48.107]) by maili.marvell.com (Postfix) with ESMTP id 9ABDB3F7057; Wed, 30 Mar 2022 01:44:04 -0700 (PDT) From: Rahul Bhansali To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Rahul Bhansali Subject: [PATCH 1/2] common/cnxk: add ROC errata list Date: Wed, 30 Mar 2022 14:13:55 +0530 Message-ID: <20220330084356.3614662-1-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: NBLDm_n-zFpNqiPNdr8pptgSTYlLi-fW X-Proofpoint-GUID: NBLDm_n-zFpNqiPNdr8pptgSTYlLi-fW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-30_03,2022-03-29_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Created roc_errata.h to list the errata handled in userspace drivers. Added no_drop_re, cq_min_size_4k, no_fc_stype_ststp, no_drop_aging, no_vwqe_flush_op etc erratas. Signed-off-by: Rahul Bhansali --- drivers/common/cnxk/roc_api.h | 3 + drivers/common/cnxk/roc_errata.h | 80 +++++++++++++++++++++++++++ drivers/common/cnxk/roc_nix_inl_dev.c | 3 +- drivers/common/cnxk/roc_nix_queue.c | 4 +- drivers/common/cnxk/roc_nix_tm_ops.c | 2 +- 5 files changed, 87 insertions(+), 5 deletions(-) create mode 100644 drivers/common/cnxk/roc_errata.h diff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h index de7452bf55..072f16d77d 100644 --- a/drivers/common/cnxk/roc_api.h +++ b/drivers/common/cnxk/roc_api.h @@ -47,6 +47,9 @@ /* Model */ #include "roc_model.h" +/* HW Errata */ +#include "roc_errata.h" + /* Mbox */ #include "roc_mbox.h" diff --git a/drivers/common/cnxk/roc_errata.h b/drivers/common/cnxk/roc_errata.h new file mode 100644 index 0000000000..31162d5232 --- /dev/null +++ b/drivers/common/cnxk/roc_errata.h @@ -0,0 +1,80 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2022 Marvell. + */ +#ifndef _ROC_ERRATA_H_ +#define _ROC_ERRATA_H_ + +/* Errata IPBUNIXRX-40129 */ +static inline bool +roc_errata_nix_has_no_drop_re(void) +{ + return (roc_model_is_cn10ka_a0() || roc_model_is_cnf10ka_a0() || + roc_model_is_cnf10kb_a0()); +} + +/* Errata NIX-34873 */ +static inline bool +roc_errata_nix_has_cq_min_size_4k(void) +{ + return (roc_model_is_cn96_a0() || roc_model_is_cn95_a0()); +} + +/* Errata IPBUNPA-37480 */ +static inline bool +roc_errata_npa_has_no_fc_stype_ststp(void) +{ + return roc_model_is_cn10ka_a0() ? true : false; +} + +/* Errata IPBUNIXTX-39337 */ +static inline bool +roc_errata_nix_has_no_drop_aging(void) +{ + return (roc_model_is_cn10ka_a0() || roc_model_is_cnf10ka_a0() || + roc_model_is_cnf10kb_a0()); +} + +/* Errata IPBUNIXRX-40130 */ +static inline bool +roc_errata_nix_has_no_vwqe_flush_op(void) +{ + return (roc_model_is_cn10ka_a0() || roc_model_is_cnf10ka_a0() || + roc_model_is_cnf10kb_a0()); +} + +/* Errata IPBURVUM-38481 */ +static inline bool +roc_errata_ruvm_has_no_interrupt_with_msixen(void) +{ + return true; +} + +/* Errata IPBUNIXTX-39300 */ +static inline bool +roc_errata_nix_has_assign_incorrect_qintidx(void) +{ + return true; +} + +/* Errata IPBUCPT-38551 */ +static inline bool +roc_errata_cpt_has_use_incorrect_ldwb(void) +{ + return true; +} + +/* Errata IPBUNIXTX-39322 */ +static inline bool +roc_errata_nix_has_overwrite_incorrect_sq_intr(void) +{ + return true; +} + +/* Errata IPBUNIXTX-39248 */ +static inline bool +roc_errata_nix_has_perf_issue_on_stats_update(void) +{ + return true; +} + +#endif /* _ROC_ERRATA_H_ */ diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c index 5a032aab52..51f1f6807b 100644 --- a/drivers/common/cnxk/roc_nix_inl_dev.c +++ b/drivers/common/cnxk/roc_nix_inl_dev.c @@ -358,8 +358,7 @@ nix_inl_nix_setup(struct nix_inl_dev *inl_dev) req->rx_cfg = NIX_INL_LF_RX_CFG; req->flags = NIX_LF_RSS_TAG_LSB_AS_ADDER; - if (roc_model_is_cn10ka_a0() || roc_model_is_cnf10ka_a0() || - roc_model_is_cnf10kb_a0()) + if (roc_errata_nix_has_no_drop_re()) req->rx_cfg &= ~ROC_NIX_LF_RX_CFG_DROP_RE; rc = mbox_process_msg(mbox, (void *)&rsp); diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index 7d271854f4..07dab4b74f 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -527,7 +527,7 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq) /* Map CQ0 [RQ0] to CINT0 and so on till max 64 irqs */ cq_ctx->cint_idx = cq->qid; - if (roc_model_is_cn96_a0() || roc_model_is_cn95_a0()) { + if (roc_errata_nix_has_cq_min_size_4k()) { const float rx_cq_skid = NIX_CQ_FULL_ERRATA_SKID; uint16_t min_rx_drop; @@ -658,7 +658,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq) memset(&aura, 0, sizeof(aura)); aura.fc_ena = 1; - if (roc_model_is_cn9k() || roc_model_is_cn10ka_a0()) + if (roc_model_is_cn9k() || roc_errata_npa_has_no_fc_stype_ststp()) aura.fc_stype = 0x0; /* STF */ else aura.fc_stype = 0x3; /* STSTP */ diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c index 1d9a02bc06..5884ce5114 100644 --- a/drivers/common/cnxk/roc_nix_tm_ops.c +++ b/drivers/common/cnxk/roc_nix_tm_ops.c @@ -38,7 +38,7 @@ roc_nix_tm_sq_aura_fc(struct roc_nix_sq *sq, bool enable) req->aura.fc_ena = enable; req->aura_mask.fc_ena = 1; - if (roc_model_is_cn9k() || roc_model_is_cn10ka_a0()) { + if (roc_model_is_cn9k() || roc_errata_npa_has_no_fc_stype_ststp()) { req->aura.fc_stype = 0x0; /* STF */ req->aura_mask.fc_stype = 0x0; /* STF */ } else { From patchwork Wed Mar 30 08:43:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Bhansali X-Patchwork-Id: 109021 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6EAB8A0509; Wed, 30 Mar 2022 10:44:20 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 16093428C7; Wed, 30 Mar 2022 10:44:20 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 6DFBA428C6 for ; Wed, 30 Mar 2022 10:44:18 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 22U3WpqA016585 for ; Wed, 30 Mar 2022 01:44:17 -0700 DKIM-Signature: v=1; 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Wed, 30 Mar 2022 01:44:15 -0700 Received: from localhost.localdomain (unknown [10.28.48.107]) by maili.marvell.com (Postfix) with ESMTP id 92C7E3F7053; Wed, 30 Mar 2022 01:44:13 -0700 (PDT) From: Rahul Bhansali To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Rahul Bhansali Subject: [PATCH 2/2] net/cnxk: use ROC errata API Date: Wed, 30 Mar 2022 14:13:56 +0530 Message-ID: <20220330084356.3614662-2-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220330084356.3614662-1-rbhansali@marvell.com> References: <20220330084356.3614662-1-rbhansali@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: phUbVnW5H-EOsN6RwylMpLCDLj_MvGLY X-Proofpoint-GUID: phUbVnW5H-EOsN6RwylMpLCDLj_MvGLY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-30_03,2022-03-29_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Used errata APIs roc_errata_nix_has_no_drop_re() and roc_errata_nix_has_cq_min_size_4k() instead of direct ROC model check. Signed-off-by: Rahul Bhansali --- drivers/net/cnxk/cn10k_ethdev.c | 4 +--- drivers/net/cnxk/cn9k_ethdev.c | 2 +- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index 15dbea2180..6f37bf5a4b 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -778,9 +778,7 @@ cn10k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) /* DROP_RE is not supported with inline IPSec for CN10K A0 and * when vector mode is enabled. */ - if ((roc_model_is_cn10ka_a0() || roc_model_is_cnf10ka_a0() || - roc_model_is_cnf10kb_a0()) && - !roc_env_is_asim()) { + if (roc_errata_nix_has_no_drop_re() && !roc_env_is_asim()) { dev->ipsecd_drop_re_dis = 1; dev->vec_drop_re_dis = 1; } diff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c index eda33dc8c5..be1276180c 100644 --- a/drivers/net/cnxk/cn9k_ethdev.c +++ b/drivers/net/cnxk/cn9k_ethdev.c @@ -737,7 +737,7 @@ cn9k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) roc_nix_ptp_info_cb_register(&dev->nix, cn9k_nix_ptp_info_update_cb); /* Update HW erratas */ - if (roc_model_is_cn96_a0() || roc_model_is_cn95_a0()) + if (roc_errata_nix_has_cq_min_size_4k()) dev->cq_min_4k = 1; return 0; }