From patchwork Thu Apr 7 06:14:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Steve Yang X-Patchwork-Id: 109399 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 83D33A050B; Thu, 7 Apr 2022 08:22:13 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 74B6B410E3; Thu, 7 Apr 2022 08:22:13 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id E974C410DC for ; Thu, 7 Apr 2022 08:22:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649312531; x=1680848531; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CUwvHQFecYjSpPckymN/Vcvf6VGmLbcEmZiHEUAcR6k=; b=hp3S1vbT6sRtb9A/rm5QYxw4E6kRMOJ7774PmxIP9Z5I17wYl48TLSqQ 0Ra7ZchSoIIpxBsjU9CwOsE1ehKc2thJvo9u34OAA7tXM+TEw+ivj9bFz S2B+cpNf9L21Uz2rMmv1SUT1AP2kQfDNVMhoHC6p48X+kYQ8NhYh0vMTo Y9+InK+3z2a1+OMJgA8WviFMZKY4JDLOoIjvSjFQh/S/TMSF5WtAICO/0 JprPZi0DmNkDw3S+QKkSLFcxykqqY5lWZiDBVWPZOzO6f08ccYdGek7M+ iGp1Ox2pOs3BfoL7GkjgkC9rLO0B8W8MughEjUGe8rN3XUhsyaDWkNUkQ Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10309"; a="260935298" X-IronPort-AV: E=Sophos;i="5.90,241,1643702400"; d="scan'208";a="260935298" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Apr 2022 23:22:08 -0700 X-IronPort-AV: E=Sophos;i="5.90,241,1643702400"; d="scan'208";a="722821118" Received: from intel-cd-odc-steve.cd.intel.com ([10.240.178.135]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Apr 2022 23:22:06 -0700 From: Steve Yang To: dev@dpdk.org Cc: qiming.yang@intel.com, Steve Yang Subject: [RFC v2] net/i40e: backport i40e fixes and share code to 21.11 Date: Thu, 7 Apr 2022 06:14:23 +0000 Message-Id: <20220407061423.1275302-1-stevex.yang@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220328080507.84821-1-stevex.yang@intel.com> References: <20220328080507.84821-1-stevex.yang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Backport all the i40e share code to 21.11 based on cid-i40e.2022.03.08. Backport all the iavf share code to 21.11 based on cid-avf.2022.03.08. Backport all DPDK bug fixes of i40e and iavf to 21.11 from 22.03. Signed-off-by: Steve Yang --- v2: add new device id for i40e. --- drivers/common/iavf/README | 2 +- drivers/common/iavf/iavf_common.c | 861 +++++++++++++++++++- drivers/common/iavf/iavf_prototype.h | 4 +- drivers/common/iavf/iavf_status.h | 2 +- drivers/common/iavf/iavf_type.h | 87 +- drivers/common/iavf/virtchnl.h | 36 +- drivers/common/iavf/virtchnl_inline_ipsec.h | 9 + drivers/net/bonding/rte_eth_bond_pmd.c | 16 +- drivers/net/i40e/base/README | 2 +- drivers/net/i40e/base/i40e_common.c | 46 +- drivers/net/i40e/base/i40e_devids.h | 2 + drivers/net/i40e/base/i40e_prototype.h | 1 + drivers/net/i40e/base/i40e_register.h | 45 +- drivers/net/i40e/base/i40e_status.h | 2 +- drivers/net/i40e/base/i40e_type.h | 7 + drivers/net/i40e/i40e_ethdev.c | 46 +- drivers/net/i40e/i40e_pf.c | 4 +- drivers/net/i40e/i40e_regs.h | 11 +- drivers/net/i40e/i40e_rxtx_vec_common.h | 2 +- drivers/net/iavf/iavf_ethdev.c | 3 + drivers/net/iavf/iavf_ipsec_crypto.c | 24 +- drivers/net/iavf/iavf_ipsec_crypto.h | 4 +- drivers/net/iavf/iavf_rxtx.c | 105 ++- drivers/net/iavf/iavf_rxtx.h | 43 +- drivers/net/iavf/iavf_rxtx_vec_avx2.c | 4 +- drivers/net/iavf/iavf_rxtx_vec_avx512.c | 4 +- drivers/net/iavf/iavf_rxtx_vec_sse.c | 4 +- drivers/net/iavf/iavf_vchnl.c | 4 +- drivers/net/ice/ice_dcf.c | 4 +- 29 files changed, 1203 insertions(+), 181 deletions(-) diff --git a/drivers/common/iavf/README b/drivers/common/iavf/README index 89bdbc827e..f59839ff97 100644 --- a/drivers/common/iavf/README +++ b/drivers/common/iavf/README @@ -6,7 +6,7 @@ Intel® IAVF driver ================= This directory contains source code of FreeBSD IAVF driver of version -cid-avf.2021.08.16.tar.gz released by the team which develops +cid-avf.2022.03.08.tar.gz released by the team which develops basic drivers for any IAVF NIC. The directory of base/ contains the original source package. diff --git a/drivers/common/iavf/iavf_common.c b/drivers/common/iavf/iavf_common.c index 855a0ab2f5..03872dece8 100644 --- a/drivers/common/iavf/iavf_common.c +++ b/drivers/common/iavf/iavf_common.c @@ -135,8 +135,8 @@ const char *iavf_stat_str(struct iavf_hw *hw, enum iavf_status stat_err) return "IAVF_ERR_INVALID_MAC_ADDR"; case IAVF_ERR_DEVICE_NOT_SUPPORTED: return "IAVF_ERR_DEVICE_NOT_SUPPORTED"; - case IAVF_ERR_MASTER_REQUESTS_PENDING: - return "IAVF_ERR_MASTER_REQUESTS_PENDING"; + case IAVF_ERR_PRIMARY_REQUESTS_PENDING: + return "IAVF_ERR_PRIMARY_REQUESTS_PENDING"; case IAVF_ERR_INVALID_LINK_SETTINGS: return "IAVF_ERR_INVALID_LINK_SETTINGS"; case IAVF_ERR_AUTONEG_NOT_COMPLETE: @@ -520,9 +520,9 @@ enum iavf_status iavf_aq_set_rss_key(struct iavf_hw *hw, return iavf_aq_get_set_rss_key(hw, vsi_id, key, true); } -/* The iavf_ptype_lookup table is used to convert from the 8-bit ptype in the - * hardware to a bit-field that can be used by SW to more easily determine the - * packet type. +/* The iavf_ptype_lookup table is used to convert from the 8-bit and 10-bit + * ptype in the hardware to a bit-field that can be used by SW to more easily + * determine the packet type. * * Macros are used to shorten the table lines and make this table human * readable. @@ -882,7 +882,852 @@ struct iavf_rx_ptype_decoded iavf_ptype_lookup[] = { IAVF_PTT_UNUSED_ENTRY(252), IAVF_PTT_UNUSED_ENTRY(253), IAVF_PTT_UNUSED_ENTRY(254), - IAVF_PTT_UNUSED_ENTRY(255) + IAVF_PTT_UNUSED_ENTRY(255), + IAVF_PTT_UNUSED_ENTRY(256), + IAVF_PTT_UNUSED_ENTRY(257), + IAVF_PTT_UNUSED_ENTRY(258), + IAVF_PTT_UNUSED_ENTRY(259), + + IAVF_PTT_UNUSED_ENTRY(260), + IAVF_PTT_UNUSED_ENTRY(261), + IAVF_PTT_UNUSED_ENTRY(262), + IAVF_PTT_UNUSED_ENTRY(263), + IAVF_PTT_UNUSED_ENTRY(264), + IAVF_PTT_UNUSED_ENTRY(265), + IAVF_PTT_UNUSED_ENTRY(266), + IAVF_PTT_UNUSED_ENTRY(267), + IAVF_PTT_UNUSED_ENTRY(268), + IAVF_PTT_UNUSED_ENTRY(269), + + IAVF_PTT_UNUSED_ENTRY(270), + IAVF_PTT_UNUSED_ENTRY(271), + IAVF_PTT_UNUSED_ENTRY(272), + IAVF_PTT_UNUSED_ENTRY(273), + IAVF_PTT_UNUSED_ENTRY(274), + IAVF_PTT_UNUSED_ENTRY(275), + IAVF_PTT_UNUSED_ENTRY(276), + IAVF_PTT_UNUSED_ENTRY(277), + IAVF_PTT_UNUSED_ENTRY(278), + IAVF_PTT_UNUSED_ENTRY(279), + + IAVF_PTT_UNUSED_ENTRY(280), + IAVF_PTT_UNUSED_ENTRY(281), + IAVF_PTT_UNUSED_ENTRY(282), + IAVF_PTT_UNUSED_ENTRY(283), + IAVF_PTT_UNUSED_ENTRY(284), + IAVF_PTT_UNUSED_ENTRY(285), + IAVF_PTT_UNUSED_ENTRY(286), + IAVF_PTT_UNUSED_ENTRY(287), + IAVF_PTT_UNUSED_ENTRY(288), + IAVF_PTT_UNUSED_ENTRY(289), + + IAVF_PTT_UNUSED_ENTRY(290), + IAVF_PTT_UNUSED_ENTRY(291), + IAVF_PTT_UNUSED_ENTRY(292), + IAVF_PTT_UNUSED_ENTRY(293), + IAVF_PTT_UNUSED_ENTRY(294), + IAVF_PTT_UNUSED_ENTRY(295), + IAVF_PTT_UNUSED_ENTRY(296), + IAVF_PTT_UNUSED_ENTRY(297), + IAVF_PTT_UNUSED_ENTRY(298), + IAVF_PTT_UNUSED_ENTRY(299), + + IAVF_PTT_UNUSED_ENTRY(300), + IAVF_PTT_UNUSED_ENTRY(301), + IAVF_PTT_UNUSED_ENTRY(302), + IAVF_PTT_UNUSED_ENTRY(303), + IAVF_PTT_UNUSED_ENTRY(304), + IAVF_PTT_UNUSED_ENTRY(305), + IAVF_PTT_UNUSED_ENTRY(306), + IAVF_PTT_UNUSED_ENTRY(307), + IAVF_PTT_UNUSED_ENTRY(308), + IAVF_PTT_UNUSED_ENTRY(309), + + IAVF_PTT_UNUSED_ENTRY(310), + IAVF_PTT_UNUSED_ENTRY(311), + IAVF_PTT_UNUSED_ENTRY(312), + IAVF_PTT_UNUSED_ENTRY(313), + IAVF_PTT_UNUSED_ENTRY(314), + IAVF_PTT_UNUSED_ENTRY(315), + IAVF_PTT_UNUSED_ENTRY(316), + IAVF_PTT_UNUSED_ENTRY(317), + IAVF_PTT_UNUSED_ENTRY(318), + IAVF_PTT_UNUSED_ENTRY(319), + + IAVF_PTT_UNUSED_ENTRY(320), + IAVF_PTT_UNUSED_ENTRY(321), + IAVF_PTT_UNUSED_ENTRY(322), + IAVF_PTT_UNUSED_ENTRY(323), + IAVF_PTT_UNUSED_ENTRY(324), + IAVF_PTT_UNUSED_ENTRY(325), + IAVF_PTT_UNUSED_ENTRY(326), + IAVF_PTT_UNUSED_ENTRY(327), + IAVF_PTT_UNUSED_ENTRY(328), + IAVF_PTT_UNUSED_ENTRY(329), + + IAVF_PTT_UNUSED_ENTRY(330), + IAVF_PTT_UNUSED_ENTRY(331), + IAVF_PTT_UNUSED_ENTRY(332), + IAVF_PTT_UNUSED_ENTRY(333), + IAVF_PTT_UNUSED_ENTRY(334), + IAVF_PTT_UNUSED_ENTRY(335), + IAVF_PTT_UNUSED_ENTRY(336), + IAVF_PTT_UNUSED_ENTRY(337), + IAVF_PTT_UNUSED_ENTRY(338), + IAVF_PTT_UNUSED_ENTRY(339), + + IAVF_PTT_UNUSED_ENTRY(340), + IAVF_PTT_UNUSED_ENTRY(341), + IAVF_PTT_UNUSED_ENTRY(342), + IAVF_PTT_UNUSED_ENTRY(343), + IAVF_PTT_UNUSED_ENTRY(344), + IAVF_PTT_UNUSED_ENTRY(345), + IAVF_PTT_UNUSED_ENTRY(346), + IAVF_PTT_UNUSED_ENTRY(347), + IAVF_PTT_UNUSED_ENTRY(348), + IAVF_PTT_UNUSED_ENTRY(349), + + IAVF_PTT_UNUSED_ENTRY(350), + IAVF_PTT_UNUSED_ENTRY(351), + IAVF_PTT_UNUSED_ENTRY(352), + IAVF_PTT_UNUSED_ENTRY(353), + IAVF_PTT_UNUSED_ENTRY(354), + IAVF_PTT_UNUSED_ENTRY(355), + IAVF_PTT_UNUSED_ENTRY(356), + IAVF_PTT_UNUSED_ENTRY(357), + IAVF_PTT_UNUSED_ENTRY(358), + IAVF_PTT_UNUSED_ENTRY(359), + + IAVF_PTT_UNUSED_ENTRY(360), + IAVF_PTT_UNUSED_ENTRY(361), + IAVF_PTT_UNUSED_ENTRY(362), + IAVF_PTT_UNUSED_ENTRY(363), + IAVF_PTT_UNUSED_ENTRY(364), + IAVF_PTT_UNUSED_ENTRY(365), + IAVF_PTT_UNUSED_ENTRY(366), + IAVF_PTT_UNUSED_ENTRY(367), + IAVF_PTT_UNUSED_ENTRY(368), + IAVF_PTT_UNUSED_ENTRY(369), + + IAVF_PTT_UNUSED_ENTRY(370), + IAVF_PTT_UNUSED_ENTRY(371), + IAVF_PTT_UNUSED_ENTRY(372), + IAVF_PTT_UNUSED_ENTRY(373), + IAVF_PTT_UNUSED_ENTRY(374), + IAVF_PTT_UNUSED_ENTRY(375), + IAVF_PTT_UNUSED_ENTRY(376), + IAVF_PTT_UNUSED_ENTRY(377), + IAVF_PTT_UNUSED_ENTRY(378), + IAVF_PTT_UNUSED_ENTRY(379), + + IAVF_PTT_UNUSED_ENTRY(380), + IAVF_PTT_UNUSED_ENTRY(381), + IAVF_PTT_UNUSED_ENTRY(382), + IAVF_PTT_UNUSED_ENTRY(383), + IAVF_PTT_UNUSED_ENTRY(384), + IAVF_PTT_UNUSED_ENTRY(385), + IAVF_PTT_UNUSED_ENTRY(386), + IAVF_PTT_UNUSED_ENTRY(387), + IAVF_PTT_UNUSED_ENTRY(388), + IAVF_PTT_UNUSED_ENTRY(389), + + IAVF_PTT_UNUSED_ENTRY(390), + IAVF_PTT_UNUSED_ENTRY(391), + IAVF_PTT_UNUSED_ENTRY(392), + IAVF_PTT_UNUSED_ENTRY(393), + IAVF_PTT_UNUSED_ENTRY(394), + IAVF_PTT_UNUSED_ENTRY(395), + IAVF_PTT_UNUSED_ENTRY(396), + IAVF_PTT_UNUSED_ENTRY(397), + IAVF_PTT_UNUSED_ENTRY(398), + IAVF_PTT_UNUSED_ENTRY(399), + + IAVF_PTT_UNUSED_ENTRY(400), + IAVF_PTT_UNUSED_ENTRY(401), + IAVF_PTT_UNUSED_ENTRY(402), + IAVF_PTT_UNUSED_ENTRY(403), + IAVF_PTT_UNUSED_ENTRY(404), + IAVF_PTT_UNUSED_ENTRY(405), + IAVF_PTT_UNUSED_ENTRY(406), + IAVF_PTT_UNUSED_ENTRY(407), + IAVF_PTT_UNUSED_ENTRY(408), + IAVF_PTT_UNUSED_ENTRY(409), + + IAVF_PTT_UNUSED_ENTRY(410), + IAVF_PTT_UNUSED_ENTRY(411), + IAVF_PTT_UNUSED_ENTRY(412), + IAVF_PTT_UNUSED_ENTRY(413), + IAVF_PTT_UNUSED_ENTRY(414), + IAVF_PTT_UNUSED_ENTRY(415), + IAVF_PTT_UNUSED_ENTRY(416), + IAVF_PTT_UNUSED_ENTRY(417), + IAVF_PTT_UNUSED_ENTRY(418), + IAVF_PTT_UNUSED_ENTRY(419), + + IAVF_PTT_UNUSED_ENTRY(420), + IAVF_PTT_UNUSED_ENTRY(421), + IAVF_PTT_UNUSED_ENTRY(422), + IAVF_PTT_UNUSED_ENTRY(423), + IAVF_PTT_UNUSED_ENTRY(424), + IAVF_PTT_UNUSED_ENTRY(425), + IAVF_PTT_UNUSED_ENTRY(426), + IAVF_PTT_UNUSED_ENTRY(427), + IAVF_PTT_UNUSED_ENTRY(428), + IAVF_PTT_UNUSED_ENTRY(429), + + IAVF_PTT_UNUSED_ENTRY(430), + IAVF_PTT_UNUSED_ENTRY(431), + IAVF_PTT_UNUSED_ENTRY(432), + IAVF_PTT_UNUSED_ENTRY(433), + IAVF_PTT_UNUSED_ENTRY(434), + IAVF_PTT_UNUSED_ENTRY(435), + IAVF_PTT_UNUSED_ENTRY(436), + IAVF_PTT_UNUSED_ENTRY(437), + IAVF_PTT_UNUSED_ENTRY(438), + IAVF_PTT_UNUSED_ENTRY(439), + + IAVF_PTT_UNUSED_ENTRY(440), + IAVF_PTT_UNUSED_ENTRY(441), + IAVF_PTT_UNUSED_ENTRY(442), + IAVF_PTT_UNUSED_ENTRY(443), + IAVF_PTT_UNUSED_ENTRY(444), + IAVF_PTT_UNUSED_ENTRY(445), + IAVF_PTT_UNUSED_ENTRY(446), + IAVF_PTT_UNUSED_ENTRY(447), + IAVF_PTT_UNUSED_ENTRY(448), + IAVF_PTT_UNUSED_ENTRY(449), + + IAVF_PTT_UNUSED_ENTRY(450), + IAVF_PTT_UNUSED_ENTRY(451), + IAVF_PTT_UNUSED_ENTRY(452), + IAVF_PTT_UNUSED_ENTRY(453), + IAVF_PTT_UNUSED_ENTRY(454), + IAVF_PTT_UNUSED_ENTRY(455), + IAVF_PTT_UNUSED_ENTRY(456), + IAVF_PTT_UNUSED_ENTRY(457), + IAVF_PTT_UNUSED_ENTRY(458), + IAVF_PTT_UNUSED_ENTRY(459), + + IAVF_PTT_UNUSED_ENTRY(460), + IAVF_PTT_UNUSED_ENTRY(461), + IAVF_PTT_UNUSED_ENTRY(462), + IAVF_PTT_UNUSED_ENTRY(463), + IAVF_PTT_UNUSED_ENTRY(464), + IAVF_PTT_UNUSED_ENTRY(465), + IAVF_PTT_UNUSED_ENTRY(466), + IAVF_PTT_UNUSED_ENTRY(467), + IAVF_PTT_UNUSED_ENTRY(468), + IAVF_PTT_UNUSED_ENTRY(469), + + IAVF_PTT_UNUSED_ENTRY(470), + IAVF_PTT_UNUSED_ENTRY(471), + IAVF_PTT_UNUSED_ENTRY(472), + IAVF_PTT_UNUSED_ENTRY(473), + IAVF_PTT_UNUSED_ENTRY(474), + IAVF_PTT_UNUSED_ENTRY(475), + IAVF_PTT_UNUSED_ENTRY(476), + IAVF_PTT_UNUSED_ENTRY(477), + IAVF_PTT_UNUSED_ENTRY(478), + IAVF_PTT_UNUSED_ENTRY(479), + + IAVF_PTT_UNUSED_ENTRY(480), + IAVF_PTT_UNUSED_ENTRY(481), + IAVF_PTT_UNUSED_ENTRY(482), + IAVF_PTT_UNUSED_ENTRY(483), + IAVF_PTT_UNUSED_ENTRY(484), + IAVF_PTT_UNUSED_ENTRY(485), + IAVF_PTT_UNUSED_ENTRY(486), + IAVF_PTT_UNUSED_ENTRY(487), + IAVF_PTT_UNUSED_ENTRY(488), + IAVF_PTT_UNUSED_ENTRY(489), + + IAVF_PTT_UNUSED_ENTRY(490), + IAVF_PTT_UNUSED_ENTRY(491), + IAVF_PTT_UNUSED_ENTRY(492), + IAVF_PTT_UNUSED_ENTRY(493), + IAVF_PTT_UNUSED_ENTRY(494), + IAVF_PTT_UNUSED_ENTRY(495), + IAVF_PTT_UNUSED_ENTRY(496), + IAVF_PTT_UNUSED_ENTRY(497), + IAVF_PTT_UNUSED_ENTRY(498), + IAVF_PTT_UNUSED_ENTRY(499), + + IAVF_PTT_UNUSED_ENTRY(500), + IAVF_PTT_UNUSED_ENTRY(501), + IAVF_PTT_UNUSED_ENTRY(502), + IAVF_PTT_UNUSED_ENTRY(503), + IAVF_PTT_UNUSED_ENTRY(504), + IAVF_PTT_UNUSED_ENTRY(505), + IAVF_PTT_UNUSED_ENTRY(506), + IAVF_PTT_UNUSED_ENTRY(507), + IAVF_PTT_UNUSED_ENTRY(508), + IAVF_PTT_UNUSED_ENTRY(509), + + IAVF_PTT_UNUSED_ENTRY(510), + IAVF_PTT_UNUSED_ENTRY(511), + IAVF_PTT_UNUSED_ENTRY(512), + IAVF_PTT_UNUSED_ENTRY(513), + IAVF_PTT_UNUSED_ENTRY(514), + IAVF_PTT_UNUSED_ENTRY(515), + IAVF_PTT_UNUSED_ENTRY(516), + IAVF_PTT_UNUSED_ENTRY(517), + IAVF_PTT_UNUSED_ENTRY(518), + IAVF_PTT_UNUSED_ENTRY(519), + + IAVF_PTT_UNUSED_ENTRY(520), + IAVF_PTT_UNUSED_ENTRY(521), + IAVF_PTT_UNUSED_ENTRY(522), + IAVF_PTT_UNUSED_ENTRY(523), + IAVF_PTT_UNUSED_ENTRY(524), + IAVF_PTT_UNUSED_ENTRY(525), + IAVF_PTT_UNUSED_ENTRY(526), + IAVF_PTT_UNUSED_ENTRY(527), + IAVF_PTT_UNUSED_ENTRY(528), + IAVF_PTT_UNUSED_ENTRY(529), + + IAVF_PTT_UNUSED_ENTRY(530), + IAVF_PTT_UNUSED_ENTRY(531), + IAVF_PTT_UNUSED_ENTRY(532), + IAVF_PTT_UNUSED_ENTRY(533), + IAVF_PTT_UNUSED_ENTRY(534), + IAVF_PTT_UNUSED_ENTRY(535), + IAVF_PTT_UNUSED_ENTRY(536), + IAVF_PTT_UNUSED_ENTRY(537), + IAVF_PTT_UNUSED_ENTRY(538), + IAVF_PTT_UNUSED_ENTRY(539), + + IAVF_PTT_UNUSED_ENTRY(540), + IAVF_PTT_UNUSED_ENTRY(541), + IAVF_PTT_UNUSED_ENTRY(542), + IAVF_PTT_UNUSED_ENTRY(543), + IAVF_PTT_UNUSED_ENTRY(544), + IAVF_PTT_UNUSED_ENTRY(545), + IAVF_PTT_UNUSED_ENTRY(546), + IAVF_PTT_UNUSED_ENTRY(547), + IAVF_PTT_UNUSED_ENTRY(548), + IAVF_PTT_UNUSED_ENTRY(549), + + IAVF_PTT_UNUSED_ENTRY(550), + IAVF_PTT_UNUSED_ENTRY(551), + IAVF_PTT_UNUSED_ENTRY(552), + IAVF_PTT_UNUSED_ENTRY(553), + IAVF_PTT_UNUSED_ENTRY(554), + IAVF_PTT_UNUSED_ENTRY(555), + IAVF_PTT_UNUSED_ENTRY(556), + IAVF_PTT_UNUSED_ENTRY(557), + IAVF_PTT_UNUSED_ENTRY(558), + IAVF_PTT_UNUSED_ENTRY(559), + + IAVF_PTT_UNUSED_ENTRY(560), + IAVF_PTT_UNUSED_ENTRY(561), + IAVF_PTT_UNUSED_ENTRY(562), + IAVF_PTT_UNUSED_ENTRY(563), + IAVF_PTT_UNUSED_ENTRY(564), + IAVF_PTT_UNUSED_ENTRY(565), + IAVF_PTT_UNUSED_ENTRY(566), + IAVF_PTT_UNUSED_ENTRY(567), + IAVF_PTT_UNUSED_ENTRY(568), + IAVF_PTT_UNUSED_ENTRY(569), + + IAVF_PTT_UNUSED_ENTRY(570), + IAVF_PTT_UNUSED_ENTRY(571), + IAVF_PTT_UNUSED_ENTRY(572), + IAVF_PTT_UNUSED_ENTRY(573), + IAVF_PTT_UNUSED_ENTRY(574), + IAVF_PTT_UNUSED_ENTRY(575), + IAVF_PTT_UNUSED_ENTRY(576), + IAVF_PTT_UNUSED_ENTRY(577), + IAVF_PTT_UNUSED_ENTRY(578), + IAVF_PTT_UNUSED_ENTRY(579), + + IAVF_PTT_UNUSED_ENTRY(580), + IAVF_PTT_UNUSED_ENTRY(581), + IAVF_PTT_UNUSED_ENTRY(582), + IAVF_PTT_UNUSED_ENTRY(583), + IAVF_PTT_UNUSED_ENTRY(584), + IAVF_PTT_UNUSED_ENTRY(585), + IAVF_PTT_UNUSED_ENTRY(586), + IAVF_PTT_UNUSED_ENTRY(587), + IAVF_PTT_UNUSED_ENTRY(588), + IAVF_PTT_UNUSED_ENTRY(589), + + IAVF_PTT_UNUSED_ENTRY(590), + IAVF_PTT_UNUSED_ENTRY(591), + IAVF_PTT_UNUSED_ENTRY(592), + IAVF_PTT_UNUSED_ENTRY(593), + IAVF_PTT_UNUSED_ENTRY(594), + IAVF_PTT_UNUSED_ENTRY(595), + IAVF_PTT_UNUSED_ENTRY(596), + IAVF_PTT_UNUSED_ENTRY(597), + IAVF_PTT_UNUSED_ENTRY(598), + IAVF_PTT_UNUSED_ENTRY(599), + + IAVF_PTT_UNUSED_ENTRY(600), + IAVF_PTT_UNUSED_ENTRY(601), + IAVF_PTT_UNUSED_ENTRY(602), + IAVF_PTT_UNUSED_ENTRY(603), + IAVF_PTT_UNUSED_ENTRY(604), + IAVF_PTT_UNUSED_ENTRY(605), + IAVF_PTT_UNUSED_ENTRY(606), + IAVF_PTT_UNUSED_ENTRY(607), + IAVF_PTT_UNUSED_ENTRY(608), + IAVF_PTT_UNUSED_ENTRY(609), + + IAVF_PTT_UNUSED_ENTRY(610), + IAVF_PTT_UNUSED_ENTRY(611), + IAVF_PTT_UNUSED_ENTRY(612), + IAVF_PTT_UNUSED_ENTRY(613), + IAVF_PTT_UNUSED_ENTRY(614), + IAVF_PTT_UNUSED_ENTRY(615), + IAVF_PTT_UNUSED_ENTRY(616), + IAVF_PTT_UNUSED_ENTRY(617), + IAVF_PTT_UNUSED_ENTRY(618), + IAVF_PTT_UNUSED_ENTRY(619), + + IAVF_PTT_UNUSED_ENTRY(620), + IAVF_PTT_UNUSED_ENTRY(621), + IAVF_PTT_UNUSED_ENTRY(622), + IAVF_PTT_UNUSED_ENTRY(623), + IAVF_PTT_UNUSED_ENTRY(624), + IAVF_PTT_UNUSED_ENTRY(625), + IAVF_PTT_UNUSED_ENTRY(626), + IAVF_PTT_UNUSED_ENTRY(627), + IAVF_PTT_UNUSED_ENTRY(628), + IAVF_PTT_UNUSED_ENTRY(629), + + IAVF_PTT_UNUSED_ENTRY(630), + IAVF_PTT_UNUSED_ENTRY(631), + IAVF_PTT_UNUSED_ENTRY(632), + IAVF_PTT_UNUSED_ENTRY(633), + IAVF_PTT_UNUSED_ENTRY(634), + IAVF_PTT_UNUSED_ENTRY(635), + IAVF_PTT_UNUSED_ENTRY(636), + IAVF_PTT_UNUSED_ENTRY(637), + IAVF_PTT_UNUSED_ENTRY(638), + IAVF_PTT_UNUSED_ENTRY(639), + + IAVF_PTT_UNUSED_ENTRY(640), + IAVF_PTT_UNUSED_ENTRY(641), + IAVF_PTT_UNUSED_ENTRY(642), + IAVF_PTT_UNUSED_ENTRY(643), + IAVF_PTT_UNUSED_ENTRY(644), + IAVF_PTT_UNUSED_ENTRY(645), + IAVF_PTT_UNUSED_ENTRY(646), + IAVF_PTT_UNUSED_ENTRY(647), + IAVF_PTT_UNUSED_ENTRY(648), + IAVF_PTT_UNUSED_ENTRY(649), + + IAVF_PTT_UNUSED_ENTRY(650), + IAVF_PTT_UNUSED_ENTRY(651), + IAVF_PTT_UNUSED_ENTRY(652), + IAVF_PTT_UNUSED_ENTRY(653), + IAVF_PTT_UNUSED_ENTRY(654), + IAVF_PTT_UNUSED_ENTRY(655), + IAVF_PTT_UNUSED_ENTRY(656), + IAVF_PTT_UNUSED_ENTRY(657), + IAVF_PTT_UNUSED_ENTRY(658), + IAVF_PTT_UNUSED_ENTRY(659), + + IAVF_PTT_UNUSED_ENTRY(660), + IAVF_PTT_UNUSED_ENTRY(661), + IAVF_PTT_UNUSED_ENTRY(662), + IAVF_PTT_UNUSED_ENTRY(663), + IAVF_PTT_UNUSED_ENTRY(664), + IAVF_PTT_UNUSED_ENTRY(665), + IAVF_PTT_UNUSED_ENTRY(666), + IAVF_PTT_UNUSED_ENTRY(667), + IAVF_PTT_UNUSED_ENTRY(668), + IAVF_PTT_UNUSED_ENTRY(669), + + IAVF_PTT_UNUSED_ENTRY(670), + IAVF_PTT_UNUSED_ENTRY(671), + IAVF_PTT_UNUSED_ENTRY(672), + IAVF_PTT_UNUSED_ENTRY(673), + IAVF_PTT_UNUSED_ENTRY(674), + IAVF_PTT_UNUSED_ENTRY(675), + IAVF_PTT_UNUSED_ENTRY(676), + IAVF_PTT_UNUSED_ENTRY(677), + IAVF_PTT_UNUSED_ENTRY(678), + IAVF_PTT_UNUSED_ENTRY(679), + + IAVF_PTT_UNUSED_ENTRY(680), + IAVF_PTT_UNUSED_ENTRY(681), + IAVF_PTT_UNUSED_ENTRY(682), + IAVF_PTT_UNUSED_ENTRY(683), + IAVF_PTT_UNUSED_ENTRY(684), + IAVF_PTT_UNUSED_ENTRY(685), + IAVF_PTT_UNUSED_ENTRY(686), + IAVF_PTT_UNUSED_ENTRY(687), + IAVF_PTT_UNUSED_ENTRY(688), + IAVF_PTT_UNUSED_ENTRY(689), + + IAVF_PTT_UNUSED_ENTRY(690), + IAVF_PTT_UNUSED_ENTRY(691), + IAVF_PTT_UNUSED_ENTRY(692), + IAVF_PTT_UNUSED_ENTRY(693), + IAVF_PTT_UNUSED_ENTRY(694), + IAVF_PTT_UNUSED_ENTRY(695), + IAVF_PTT_UNUSED_ENTRY(696), + IAVF_PTT_UNUSED_ENTRY(697), + IAVF_PTT_UNUSED_ENTRY(698), + IAVF_PTT_UNUSED_ENTRY(699), + + IAVF_PTT_UNUSED_ENTRY(700), + IAVF_PTT_UNUSED_ENTRY(701), + IAVF_PTT_UNUSED_ENTRY(702), + IAVF_PTT_UNUSED_ENTRY(703), + IAVF_PTT_UNUSED_ENTRY(704), + IAVF_PTT_UNUSED_ENTRY(705), + IAVF_PTT_UNUSED_ENTRY(706), + IAVF_PTT_UNUSED_ENTRY(707), + IAVF_PTT_UNUSED_ENTRY(708), + IAVF_PTT_UNUSED_ENTRY(709), + + IAVF_PTT_UNUSED_ENTRY(710), + IAVF_PTT_UNUSED_ENTRY(711), + IAVF_PTT_UNUSED_ENTRY(712), + IAVF_PTT_UNUSED_ENTRY(713), + IAVF_PTT_UNUSED_ENTRY(714), + IAVF_PTT_UNUSED_ENTRY(715), + IAVF_PTT_UNUSED_ENTRY(716), + IAVF_PTT_UNUSED_ENTRY(717), + IAVF_PTT_UNUSED_ENTRY(718), + IAVF_PTT_UNUSED_ENTRY(719), + + IAVF_PTT_UNUSED_ENTRY(720), + IAVF_PTT_UNUSED_ENTRY(721), + IAVF_PTT_UNUSED_ENTRY(722), + IAVF_PTT_UNUSED_ENTRY(723), + IAVF_PTT_UNUSED_ENTRY(724), + IAVF_PTT_UNUSED_ENTRY(725), + IAVF_PTT_UNUSED_ENTRY(726), + IAVF_PTT_UNUSED_ENTRY(727), + IAVF_PTT_UNUSED_ENTRY(728), + IAVF_PTT_UNUSED_ENTRY(729), + + IAVF_PTT_UNUSED_ENTRY(730), + IAVF_PTT_UNUSED_ENTRY(731), + IAVF_PTT_UNUSED_ENTRY(732), + IAVF_PTT_UNUSED_ENTRY(733), + IAVF_PTT_UNUSED_ENTRY(734), + IAVF_PTT_UNUSED_ENTRY(735), + IAVF_PTT_UNUSED_ENTRY(736), + IAVF_PTT_UNUSED_ENTRY(737), + IAVF_PTT_UNUSED_ENTRY(738), + IAVF_PTT_UNUSED_ENTRY(739), + + IAVF_PTT_UNUSED_ENTRY(740), + IAVF_PTT_UNUSED_ENTRY(741), + IAVF_PTT_UNUSED_ENTRY(742), + IAVF_PTT_UNUSED_ENTRY(743), + IAVF_PTT_UNUSED_ENTRY(744), + IAVF_PTT_UNUSED_ENTRY(745), + IAVF_PTT_UNUSED_ENTRY(746), + IAVF_PTT_UNUSED_ENTRY(747), + IAVF_PTT_UNUSED_ENTRY(748), + IAVF_PTT_UNUSED_ENTRY(749), + + IAVF_PTT_UNUSED_ENTRY(750), + IAVF_PTT_UNUSED_ENTRY(751), + IAVF_PTT_UNUSED_ENTRY(752), + IAVF_PTT_UNUSED_ENTRY(753), + IAVF_PTT_UNUSED_ENTRY(754), + IAVF_PTT_UNUSED_ENTRY(755), + IAVF_PTT_UNUSED_ENTRY(756), + IAVF_PTT_UNUSED_ENTRY(757), + IAVF_PTT_UNUSED_ENTRY(758), + IAVF_PTT_UNUSED_ENTRY(759), + + IAVF_PTT_UNUSED_ENTRY(760), + IAVF_PTT_UNUSED_ENTRY(761), + IAVF_PTT_UNUSED_ENTRY(762), + IAVF_PTT_UNUSED_ENTRY(763), + IAVF_PTT_UNUSED_ENTRY(764), + IAVF_PTT_UNUSED_ENTRY(765), + IAVF_PTT_UNUSED_ENTRY(766), + IAVF_PTT_UNUSED_ENTRY(767), + IAVF_PTT_UNUSED_ENTRY(768), + IAVF_PTT_UNUSED_ENTRY(769), + + IAVF_PTT_UNUSED_ENTRY(770), + IAVF_PTT_UNUSED_ENTRY(771), + IAVF_PTT_UNUSED_ENTRY(772), + IAVF_PTT_UNUSED_ENTRY(773), + IAVF_PTT_UNUSED_ENTRY(774), + IAVF_PTT_UNUSED_ENTRY(775), + IAVF_PTT_UNUSED_ENTRY(776), + IAVF_PTT_UNUSED_ENTRY(777), + IAVF_PTT_UNUSED_ENTRY(778), + IAVF_PTT_UNUSED_ENTRY(779), + + IAVF_PTT_UNUSED_ENTRY(780), + IAVF_PTT_UNUSED_ENTRY(781), + IAVF_PTT_UNUSED_ENTRY(782), + IAVF_PTT_UNUSED_ENTRY(783), + IAVF_PTT_UNUSED_ENTRY(784), + IAVF_PTT_UNUSED_ENTRY(785), + IAVF_PTT_UNUSED_ENTRY(786), + IAVF_PTT_UNUSED_ENTRY(787), + IAVF_PTT_UNUSED_ENTRY(788), + IAVF_PTT_UNUSED_ENTRY(789), + + IAVF_PTT_UNUSED_ENTRY(790), + IAVF_PTT_UNUSED_ENTRY(791), + IAVF_PTT_UNUSED_ENTRY(792), + IAVF_PTT_UNUSED_ENTRY(793), + IAVF_PTT_UNUSED_ENTRY(794), + IAVF_PTT_UNUSED_ENTRY(795), + IAVF_PTT_UNUSED_ENTRY(796), + IAVF_PTT_UNUSED_ENTRY(797), + IAVF_PTT_UNUSED_ENTRY(798), + IAVF_PTT_UNUSED_ENTRY(799), + + IAVF_PTT_UNUSED_ENTRY(800), + IAVF_PTT_UNUSED_ENTRY(801), + IAVF_PTT_UNUSED_ENTRY(802), + IAVF_PTT_UNUSED_ENTRY(803), + IAVF_PTT_UNUSED_ENTRY(804), + IAVF_PTT_UNUSED_ENTRY(805), + IAVF_PTT_UNUSED_ENTRY(806), + IAVF_PTT_UNUSED_ENTRY(807), + IAVF_PTT_UNUSED_ENTRY(808), + IAVF_PTT_UNUSED_ENTRY(809), + + IAVF_PTT_UNUSED_ENTRY(810), + IAVF_PTT_UNUSED_ENTRY(811), + IAVF_PTT_UNUSED_ENTRY(812), + IAVF_PTT_UNUSED_ENTRY(813), + IAVF_PTT_UNUSED_ENTRY(814), + IAVF_PTT_UNUSED_ENTRY(815), + IAVF_PTT_UNUSED_ENTRY(816), + IAVF_PTT_UNUSED_ENTRY(817), + IAVF_PTT_UNUSED_ENTRY(818), + IAVF_PTT_UNUSED_ENTRY(819), + + IAVF_PTT_UNUSED_ENTRY(820), + IAVF_PTT_UNUSED_ENTRY(821), + IAVF_PTT_UNUSED_ENTRY(822), + IAVF_PTT_UNUSED_ENTRY(823), + IAVF_PTT_UNUSED_ENTRY(824), + IAVF_PTT_UNUSED_ENTRY(825), + IAVF_PTT_UNUSED_ENTRY(826), + IAVF_PTT_UNUSED_ENTRY(827), + IAVF_PTT_UNUSED_ENTRY(828), + IAVF_PTT_UNUSED_ENTRY(829), + + IAVF_PTT_UNUSED_ENTRY(830), + IAVF_PTT_UNUSED_ENTRY(831), + IAVF_PTT_UNUSED_ENTRY(832), + IAVF_PTT_UNUSED_ENTRY(833), + IAVF_PTT_UNUSED_ENTRY(834), + IAVF_PTT_UNUSED_ENTRY(835), + IAVF_PTT_UNUSED_ENTRY(836), + IAVF_PTT_UNUSED_ENTRY(837), + IAVF_PTT_UNUSED_ENTRY(838), + IAVF_PTT_UNUSED_ENTRY(839), + + IAVF_PTT_UNUSED_ENTRY(840), + IAVF_PTT_UNUSED_ENTRY(841), + IAVF_PTT_UNUSED_ENTRY(842), + IAVF_PTT_UNUSED_ENTRY(843), + IAVF_PTT_UNUSED_ENTRY(844), + IAVF_PTT_UNUSED_ENTRY(845), + IAVF_PTT_UNUSED_ENTRY(846), + IAVF_PTT_UNUSED_ENTRY(847), + IAVF_PTT_UNUSED_ENTRY(848), + IAVF_PTT_UNUSED_ENTRY(849), + + IAVF_PTT_UNUSED_ENTRY(850), + IAVF_PTT_UNUSED_ENTRY(851), + IAVF_PTT_UNUSED_ENTRY(852), + IAVF_PTT_UNUSED_ENTRY(853), + IAVF_PTT_UNUSED_ENTRY(854), + IAVF_PTT_UNUSED_ENTRY(855), + IAVF_PTT_UNUSED_ENTRY(856), + IAVF_PTT_UNUSED_ENTRY(857), + IAVF_PTT_UNUSED_ENTRY(858), + IAVF_PTT_UNUSED_ENTRY(859), + + IAVF_PTT_UNUSED_ENTRY(860), + IAVF_PTT_UNUSED_ENTRY(861), + IAVF_PTT_UNUSED_ENTRY(862), + IAVF_PTT_UNUSED_ENTRY(863), + IAVF_PTT_UNUSED_ENTRY(864), + IAVF_PTT_UNUSED_ENTRY(865), + IAVF_PTT_UNUSED_ENTRY(866), + IAVF_PTT_UNUSED_ENTRY(867), + IAVF_PTT_UNUSED_ENTRY(868), + IAVF_PTT_UNUSED_ENTRY(869), + + IAVF_PTT_UNUSED_ENTRY(870), + IAVF_PTT_UNUSED_ENTRY(871), + IAVF_PTT_UNUSED_ENTRY(872), + IAVF_PTT_UNUSED_ENTRY(873), + IAVF_PTT_UNUSED_ENTRY(874), + IAVF_PTT_UNUSED_ENTRY(875), + IAVF_PTT_UNUSED_ENTRY(876), + IAVF_PTT_UNUSED_ENTRY(877), + IAVF_PTT_UNUSED_ENTRY(878), + IAVF_PTT_UNUSED_ENTRY(879), + + IAVF_PTT_UNUSED_ENTRY(880), + IAVF_PTT_UNUSED_ENTRY(881), + IAVF_PTT_UNUSED_ENTRY(882), + IAVF_PTT_UNUSED_ENTRY(883), + IAVF_PTT_UNUSED_ENTRY(884), + IAVF_PTT_UNUSED_ENTRY(885), + IAVF_PTT_UNUSED_ENTRY(886), + IAVF_PTT_UNUSED_ENTRY(887), + IAVF_PTT_UNUSED_ENTRY(888), + IAVF_PTT_UNUSED_ENTRY(889), + + IAVF_PTT_UNUSED_ENTRY(890), + IAVF_PTT_UNUSED_ENTRY(891), + IAVF_PTT_UNUSED_ENTRY(892), + IAVF_PTT_UNUSED_ENTRY(893), + IAVF_PTT_UNUSED_ENTRY(894), + IAVF_PTT_UNUSED_ENTRY(895), + IAVF_PTT_UNUSED_ENTRY(896), + IAVF_PTT_UNUSED_ENTRY(897), + IAVF_PTT_UNUSED_ENTRY(898), + IAVF_PTT_UNUSED_ENTRY(899), + + IAVF_PTT_UNUSED_ENTRY(900), + IAVF_PTT_UNUSED_ENTRY(901), + IAVF_PTT_UNUSED_ENTRY(902), + IAVF_PTT_UNUSED_ENTRY(903), + IAVF_PTT_UNUSED_ENTRY(904), + IAVF_PTT_UNUSED_ENTRY(905), + IAVF_PTT_UNUSED_ENTRY(906), + IAVF_PTT_UNUSED_ENTRY(907), + IAVF_PTT_UNUSED_ENTRY(908), + IAVF_PTT_UNUSED_ENTRY(909), + + IAVF_PTT_UNUSED_ENTRY(910), + IAVF_PTT_UNUSED_ENTRY(911), + IAVF_PTT_UNUSED_ENTRY(912), + IAVF_PTT_UNUSED_ENTRY(913), + IAVF_PTT_UNUSED_ENTRY(914), + IAVF_PTT_UNUSED_ENTRY(915), + IAVF_PTT_UNUSED_ENTRY(916), + IAVF_PTT_UNUSED_ENTRY(917), + IAVF_PTT_UNUSED_ENTRY(918), + IAVF_PTT_UNUSED_ENTRY(919), + + IAVF_PTT_UNUSED_ENTRY(920), + IAVF_PTT_UNUSED_ENTRY(921), + IAVF_PTT_UNUSED_ENTRY(922), + IAVF_PTT_UNUSED_ENTRY(923), + IAVF_PTT_UNUSED_ENTRY(924), + IAVF_PTT_UNUSED_ENTRY(925), + IAVF_PTT_UNUSED_ENTRY(926), + IAVF_PTT_UNUSED_ENTRY(927), + IAVF_PTT_UNUSED_ENTRY(928), + IAVF_PTT_UNUSED_ENTRY(929), + + IAVF_PTT_UNUSED_ENTRY(930), + IAVF_PTT_UNUSED_ENTRY(931), + IAVF_PTT_UNUSED_ENTRY(932), + IAVF_PTT_UNUSED_ENTRY(933), + IAVF_PTT_UNUSED_ENTRY(934), + IAVF_PTT_UNUSED_ENTRY(935), + IAVF_PTT_UNUSED_ENTRY(936), + IAVF_PTT_UNUSED_ENTRY(937), + IAVF_PTT_UNUSED_ENTRY(938), + IAVF_PTT_UNUSED_ENTRY(939), + + IAVF_PTT_UNUSED_ENTRY(940), + IAVF_PTT_UNUSED_ENTRY(941), + IAVF_PTT_UNUSED_ENTRY(942), + IAVF_PTT_UNUSED_ENTRY(943), + IAVF_PTT_UNUSED_ENTRY(944), + IAVF_PTT_UNUSED_ENTRY(945), + IAVF_PTT_UNUSED_ENTRY(946), + IAVF_PTT_UNUSED_ENTRY(947), + IAVF_PTT_UNUSED_ENTRY(948), + IAVF_PTT_UNUSED_ENTRY(949), + + IAVF_PTT_UNUSED_ENTRY(950), + IAVF_PTT_UNUSED_ENTRY(951), + IAVF_PTT_UNUSED_ENTRY(952), + IAVF_PTT_UNUSED_ENTRY(953), + IAVF_PTT_UNUSED_ENTRY(954), + IAVF_PTT_UNUSED_ENTRY(955), + IAVF_PTT_UNUSED_ENTRY(956), + IAVF_PTT_UNUSED_ENTRY(957), + IAVF_PTT_UNUSED_ENTRY(958), + IAVF_PTT_UNUSED_ENTRY(959), + + IAVF_PTT_UNUSED_ENTRY(960), + IAVF_PTT_UNUSED_ENTRY(961), + IAVF_PTT_UNUSED_ENTRY(962), + IAVF_PTT_UNUSED_ENTRY(963), + IAVF_PTT_UNUSED_ENTRY(964), + IAVF_PTT_UNUSED_ENTRY(965), + IAVF_PTT_UNUSED_ENTRY(966), + IAVF_PTT_UNUSED_ENTRY(967), + IAVF_PTT_UNUSED_ENTRY(968), + IAVF_PTT_UNUSED_ENTRY(969), + + IAVF_PTT_UNUSED_ENTRY(970), + IAVF_PTT_UNUSED_ENTRY(971), + IAVF_PTT_UNUSED_ENTRY(972), + IAVF_PTT_UNUSED_ENTRY(973), + IAVF_PTT_UNUSED_ENTRY(974), + IAVF_PTT_UNUSED_ENTRY(975), + IAVF_PTT_UNUSED_ENTRY(976), + IAVF_PTT_UNUSED_ENTRY(977), + IAVF_PTT_UNUSED_ENTRY(978), + IAVF_PTT_UNUSED_ENTRY(979), + + IAVF_PTT_UNUSED_ENTRY(980), + IAVF_PTT_UNUSED_ENTRY(981), + IAVF_PTT_UNUSED_ENTRY(982), + IAVF_PTT_UNUSED_ENTRY(983), + IAVF_PTT_UNUSED_ENTRY(984), + IAVF_PTT_UNUSED_ENTRY(985), + IAVF_PTT_UNUSED_ENTRY(986), + IAVF_PTT_UNUSED_ENTRY(987), + IAVF_PTT_UNUSED_ENTRY(988), + IAVF_PTT_UNUSED_ENTRY(989), + + IAVF_PTT_UNUSED_ENTRY(990), + IAVF_PTT_UNUSED_ENTRY(991), + IAVF_PTT_UNUSED_ENTRY(992), + IAVF_PTT_UNUSED_ENTRY(993), + IAVF_PTT_UNUSED_ENTRY(994), + IAVF_PTT_UNUSED_ENTRY(995), + IAVF_PTT_UNUSED_ENTRY(996), + IAVF_PTT_UNUSED_ENTRY(997), + IAVF_PTT_UNUSED_ENTRY(998), + IAVF_PTT_UNUSED_ENTRY(999), + + IAVF_PTT_UNUSED_ENTRY(1000), + IAVF_PTT_UNUSED_ENTRY(1001), + IAVF_PTT_UNUSED_ENTRY(1002), + IAVF_PTT_UNUSED_ENTRY(1003), + IAVF_PTT_UNUSED_ENTRY(1004), + IAVF_PTT_UNUSED_ENTRY(1005), + IAVF_PTT_UNUSED_ENTRY(1006), + IAVF_PTT_UNUSED_ENTRY(1007), + IAVF_PTT_UNUSED_ENTRY(1008), + IAVF_PTT_UNUSED_ENTRY(1009), + + IAVF_PTT_UNUSED_ENTRY(1010), + IAVF_PTT_UNUSED_ENTRY(1011), + IAVF_PTT_UNUSED_ENTRY(1012), + IAVF_PTT_UNUSED_ENTRY(1013), + IAVF_PTT_UNUSED_ENTRY(1014), + IAVF_PTT_UNUSED_ENTRY(1015), + IAVF_PTT_UNUSED_ENTRY(1016), + IAVF_PTT_UNUSED_ENTRY(1017), + IAVF_PTT_UNUSED_ENTRY(1018), + IAVF_PTT_UNUSED_ENTRY(1019), + + IAVF_PTT_UNUSED_ENTRY(1020), + IAVF_PTT_UNUSED_ENTRY(1021), + IAVF_PTT_UNUSED_ENTRY(1022), + IAVF_PTT_UNUSED_ENTRY(1023), }; /** @@ -924,7 +1769,7 @@ enum iavf_status iavf_validate_mac_addr(u8 *mac_addr) **/ enum iavf_status iavf_aq_send_msg_to_pf(struct iavf_hw *hw, enum virtchnl_ops v_opcode, - enum iavf_status v_retval, + enum virtchnl_status_code v_retval, u8 *msg, u16 msglen, struct iavf_asq_cmd_details *cmd_details) { @@ -1001,7 +1846,7 @@ void iavf_vf_parse_hw_config(struct iavf_hw *hw, enum iavf_status iavf_vf_reset(struct iavf_hw *hw) { return iavf_aq_send_msg_to_pf(hw, VIRTCHNL_OP_RESET_VF, - IAVF_SUCCESS, NULL, 0, NULL); + VIRTCHNL_STATUS_SUCCESS, NULL, 0, NULL); } /** diff --git a/drivers/common/iavf/iavf_prototype.h b/drivers/common/iavf/iavf_prototype.h index 1c125d1d94..16cb973bb8 100644 --- a/drivers/common/iavf/iavf_prototype.h +++ b/drivers/common/iavf/iavf_prototype.h @@ -69,7 +69,7 @@ enum iavf_status iavf_set_mac_type(struct iavf_hw *hw); extern struct iavf_rx_ptype_decoded iavf_ptype_lookup[]; -STATIC INLINE struct iavf_rx_ptype_decoded decode_rx_desc_ptype(u8 ptype) +STATIC INLINE struct iavf_rx_ptype_decoded decode_rx_desc_ptype(u16 ptype) { return iavf_ptype_lookup[ptype]; } @@ -87,7 +87,7 @@ enum iavf_status iavf_vf_reset(struct iavf_hw *hw); __rte_internal enum iavf_status iavf_aq_send_msg_to_pf(struct iavf_hw *hw, enum virtchnl_ops v_opcode, - enum iavf_status v_retval, + enum virtchnl_status_code v_retval, u8 *msg, u16 msglen, struct iavf_asq_cmd_details *cmd_details); enum iavf_status iavf_aq_debug_dump(struct iavf_hw *hw, u8 cluster_id, diff --git a/drivers/common/iavf/iavf_status.h b/drivers/common/iavf/iavf_status.h index b96887738d..4dd0f5c5d8 100644 --- a/drivers/common/iavf/iavf_status.h +++ b/drivers/common/iavf/iavf_status.h @@ -19,7 +19,7 @@ enum iavf_status { IAVF_ERR_ADAPTER_STOPPED = -9, IAVF_ERR_INVALID_MAC_ADDR = -10, IAVF_ERR_DEVICE_NOT_SUPPORTED = -11, - IAVF_ERR_MASTER_REQUESTS_PENDING = -12, + IAVF_ERR_PRIMARY_REQUESTS_PENDING = -12, IAVF_ERR_INVALID_LINK_SETTINGS = -13, IAVF_ERR_AUTONEG_NOT_COMPLETE = -14, IAVF_ERR_RESET_FAILED = -15, diff --git a/drivers/common/iavf/iavf_type.h b/drivers/common/iavf/iavf_type.h index 51267ca3b3..49d262d795 100644 --- a/drivers/common/iavf/iavf_type.h +++ b/drivers/common/iavf/iavf_type.h @@ -397,6 +397,45 @@ union iavf_16byte_rx_desc { } wb; /* writeback */ }; +/* Rx Flex Descriptor NIC Profile + * RxDID Profile ID 2 + * Flex-field 0: RSS hash lower 16-bits + * Flex-field 1: RSS hash upper 16-bits + * Flex-field 2: Flow ID lower 16-bits + * Flex-field 3: Flow ID higher 16-bits + * Flex-field 4: reserved, VLAN ID taken from L2Tag + */ +struct iavf_32byte_rx_flex_wb { + /* Qword 0 */ + u8 rxdid; + u8 mir_id_umb_cast; + __le16 ptype_flexi_flags0; + __le16 pkt_len; + __le16 hdr_len_sph_flex_flags1; + + /* Qword 1 */ + __le16 status_error0; + __le16 l2tag1; + __le32 rss_hash; + + /* Qword 2 */ + __le16 status_error1; + u8 flexi_flags2; + u8 ts_low; + __le16 l2tag2_1st; + __le16 l2tag2_2nd; + + /* Qword 3 */ + __le32 flow_id; + union { + struct { + __le16 rsvd; + __le16 flow_id_ipv6; + } flex; + __le32 ts_high; + } flex_ts; +}; + union iavf_32byte_rx_desc { struct { __le64 pkt_addr; /* Packet buffer address */ @@ -444,6 +483,7 @@ union iavf_32byte_rx_desc { } hi_dword; } qword3; } wb; /* writeback */ + struct iavf_32byte_rx_flex_wb flex_wb; }; #define IAVF_RXD_QW0_MIRROR_STATUS_SHIFT 8 @@ -528,6 +568,51 @@ enum iavf_rx_desc_error_l3l4e_fcoe_masks { #define IAVF_RXD_QW1_PTYPE_SHIFT 30 #define IAVF_RXD_QW1_PTYPE_MASK (0xFFULL << IAVF_RXD_QW1_PTYPE_SHIFT) +/* for iavf_32byte_rx_flex_wb.ptype_flexi_flags0 member */ +#define IAVF_RX_FLEX_DESC_PTYPE_M (0x3FF) /* 10-bits */ + +/* for iavf_32byte_rx_flex_wb.pkt_length member */ +#define IAVF_RX_FLEX_DESC_PKT_LEN_M (0x3FFF) /* 14-bits */ + +enum iavf_rx_flex_desc_status_error_0_bits { + /* Note: These are predefined bit offsets */ + IAVF_RX_FLEX_DESC_STATUS0_DD_S = 0, + IAVF_RX_FLEX_DESC_STATUS0_EOF_S, + IAVF_RX_FLEX_DESC_STATUS0_HBO_S, + IAVF_RX_FLEX_DESC_STATUS0_L3L4P_S, + IAVF_RX_FLEX_DESC_STATUS0_XSUM_IPE_S, + IAVF_RX_FLEX_DESC_STATUS0_XSUM_L4E_S, + IAVF_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S, + IAVF_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S, + IAVF_RX_FLEX_DESC_STATUS0_LPBK_S, + IAVF_RX_FLEX_DESC_STATUS0_IPV6EXADD_S, + IAVF_RX_FLEX_DESC_STATUS0_RXE_S, + IAVF_RX_FLEX_DESC_STATUS0_CRCP_S, + IAVF_RX_FLEX_DESC_STATUS0_RSS_VALID_S, + IAVF_RX_FLEX_DESC_STATUS0_L2TAG1P_S, + IAVF_RX_FLEX_DESC_STATUS0_XTRMD0_VALID_S, + IAVF_RX_FLEX_DESC_STATUS0_XTRMD1_VALID_S, + IAVF_RX_FLEX_DESC_STATUS0_LAST /* this entry must be last!!! */ +}; + +enum iavf_rx_flex_desc_status_error_1_bits { + /* Note: These are predefined bit offsets */ + /* Bits 3:0 are reserved for inline ipsec status */ + IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_0 = 0, + IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_1, + IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_2, + IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_3, + IAVF_RX_FLEX_DESC_STATUS1_NAT_S, + IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_PROCESSED, + /* [10:6] reserved */ + IAVF_RX_FLEX_DESC_STATUS1_L2TAG2P_S = 11, + IAVF_RX_FLEX_DESC_STATUS1_XTRMD2_VALID_S = 12, + IAVF_RX_FLEX_DESC_STATUS1_XTRMD3_VALID_S = 13, + IAVF_RX_FLEX_DESC_STATUS1_XTRMD4_VALID_S = 14, + IAVF_RX_FLEX_DESC_STATUS1_XTRMD5_VALID_S = 15, + IAVF_RX_FLEX_DESC_STATUS1_LAST /* this entry must be last!!! */ +}; + /* Packet type non-ip values */ enum iavf_rx_l2_ptype { IAVF_RX_PTYPE_L2_RESERVED = 0, @@ -560,7 +645,7 @@ enum iavf_rx_l2_ptype { }; struct iavf_rx_ptype_decoded { - u32 ptype:8; + u32 ptype:10; u32 known:1; u32 outer_ip:1; u32 outer_ip_ver:1; diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h index 269578f7c0..d015a785b9 100644 --- a/drivers/common/iavf/virtchnl.h +++ b/drivers/common/iavf/virtchnl.h @@ -23,7 +23,7 @@ * * The PF is required to return a status code in v_retval for all messages * except RESET_VF, which does not require any response. The returned value - * is of virtchnl_status_code type, defined in the shared type.h. + * is of virtchnl_status_code type, defined here. * * In general, VF driver initialization should roughly follow the order of * these opcodes. The VF driver must first validate the API version of the @@ -40,7 +40,11 @@ #include "virtchnl_inline_ipsec.h" -/* Error Codes */ +/* Error Codes + * Note that many older versions of various iAVF drivers convert the reported + * status code directly into an iavf_status enumeration. For this reason, it + * is important that the values of these enumerations line up. + */ enum virtchnl_status_code { VIRTCHNL_STATUS_SUCCESS = 0, VIRTCHNL_STATUS_ERR_PARAM = -5, @@ -281,6 +285,30 @@ static inline const char *virtchnl_op_str(enum virtchnl_ops v_opcode) } } +static inline const char *virtchnl_stat_str(enum virtchnl_status_code v_status) +{ + switch (v_status) { + case VIRTCHNL_STATUS_SUCCESS: + return "VIRTCHNL_STATUS_SUCCESS"; + case VIRTCHNL_STATUS_ERR_PARAM: + return "VIRTCHNL_STATUS_ERR_PARAM"; + case VIRTCHNL_STATUS_ERR_NO_MEMORY: + return "VIRTCHNL_STATUS_ERR_NO_MEMORY"; + case VIRTCHNL_STATUS_ERR_OPCODE_MISMATCH: + return "VIRTCHNL_STATUS_ERR_OPCODE_MISMATCH"; + case VIRTCHNL_STATUS_ERR_CQP_COMPL_ERROR: + return "VIRTCHNL_STATUS_ERR_CQP_COMPL_ERROR"; + case VIRTCHNL_STATUS_ERR_INVALID_VF_ID: + return "VIRTCHNL_STATUS_ERR_INVALID_VF_ID"; + case VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR: + return "VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR"; + case VIRTCHNL_STATUS_ERR_NOT_SUPPORTED: + return "VIRTCHNL_STATUS_ERR_NOT_SUPPORTED"; + default: + return "Unknown status code (update virtchnl.h)"; + } +} + /* These macros are used to generate compilation errors if a structure/union * is not exactly the correct length. It gives a divide by zero error if the * structure/union is not of the correct size, otherwise it creates an enum @@ -1653,6 +1681,10 @@ enum virtchnl_proto_hdr_field { PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_DWN), VIRTCHNL_PROTO_HDR_GTPU_UP_QFI = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_UP), + /* L2TPv2 */ + VIRTCHNL_PROTO_HDR_L2TPV2_SESS_ID = + PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_L2TPV2), + VIRTCHNL_PROTO_HDR_L2TPV2_LEN_SESS_ID, }; struct virtchnl_proto_hdr { diff --git a/drivers/common/iavf/virtchnl_inline_ipsec.h b/drivers/common/iavf/virtchnl_inline_ipsec.h index 1e9134501e..2f4bf15725 100644 --- a/drivers/common/iavf/virtchnl_inline_ipsec.h +++ b/drivers/common/iavf/virtchnl_inline_ipsec.h @@ -446,6 +446,15 @@ struct virtchnl_ipsec_sp_cfg { /* Set TC (congestion domain) if true. For future use. */ u8 set_tc; + + /* 0 for NAT-T unsupported, 1 for NAT-T supported */ + u8 is_udp; + + /* reserved */ + u8 reserved; + + /* NAT-T UDP port number. Only valid in case NAT-T supported */ + u16 udp_port; } __rte_packed; diff --git a/drivers/net/bonding/rte_eth_bond_pmd.c b/drivers/net/bonding/rte_eth_bond_pmd.c index 84f4900ee5..2e381ee174 100644 --- a/drivers/net/bonding/rte_eth_bond_pmd.c +++ b/drivers/net/bonding/rte_eth_bond_pmd.c @@ -1734,14 +1734,6 @@ slave_configure(struct rte_eth_dev *bonded_eth_dev, } } - errval = rte_eth_dev_set_mtu(slave_eth_dev->data->port_id, - bonded_eth_dev->data->mtu); - if (errval != 0 && errval != -ENOTSUP) { - RTE_BOND_LOG(ERR, "rte_eth_dev_set_mtu: port %u, err (%d)", - slave_eth_dev->data->port_id, errval); - return errval; - } - /* Configure device */ errval = rte_eth_dev_configure(slave_eth_dev->data->port_id, nb_rx_queues, nb_tx_queues, @@ -1752,6 +1744,14 @@ slave_configure(struct rte_eth_dev *bonded_eth_dev, return errval; } + errval = rte_eth_dev_set_mtu(slave_eth_dev->data->port_id, + bonded_eth_dev->data->mtu); + if (errval != 0 && errval != -ENOTSUP) { + RTE_BOND_LOG(ERR, "rte_eth_dev_set_mtu: port %u, err (%d)", + slave_eth_dev->data->port_id, errval); + return errval; + } + /* Setup Rx Queues */ for (q_id = 0; q_id < bonded_eth_dev->data->nb_rx_queues; q_id++) { bd_rx_q = (struct bond_rx_queue *)bonded_eth_dev->data->rx_queues[q_id]; diff --git a/drivers/net/i40e/base/README b/drivers/net/i40e/base/README index 2e4fa5a921..b1da53db2b 100644 --- a/drivers/net/i40e/base/README +++ b/drivers/net/i40e/base/README @@ -6,7 +6,7 @@ Intel® I40E driver ================== This directory contains source code of FreeBSD i40e driver of version -cid-i40e.2021.08.16.tar.gz released by the team which develops +cid-i40e.2022.03.08.tar.gz released by the team which develops basic drivers for any i40e NIC. The directory of base/ contains the original source package. This driver is valid for the product(s) listed below diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c index 9eee104063..122a3782a4 100644 --- a/drivers/net/i40e/base/i40e_common.c +++ b/drivers/net/i40e/base/i40e_common.c @@ -37,6 +37,7 @@ enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw) case I40E_DEV_ID_10G_B: case I40E_DEV_ID_10G_SFP: case I40E_DEV_ID_5G_BASE_T_BC: + case I40E_DEV_ID_1G_BASE_T_BC: case I40E_DEV_ID_20G_KR2: case I40E_DEV_ID_20G_KR2_A: case I40E_DEV_ID_25G_B: @@ -54,6 +55,7 @@ enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw) case I40E_DEV_ID_1G_BASE_T_X722: case I40E_DEV_ID_10G_BASE_T_X722: case I40E_DEV_ID_SFP_I_X722: + case I40E_DEV_ID_SFP_X722_A: hw->mac.type = I40E_MAC_X722; break; #if defined(INTEGRATED_VF) || defined(VF_DRIVER) @@ -176,8 +178,8 @@ const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err) return "I40E_ERR_INVALID_MAC_ADDR"; case I40E_ERR_DEVICE_NOT_SUPPORTED: return "I40E_ERR_DEVICE_NOT_SUPPORTED"; - case I40E_ERR_MASTER_REQUESTS_PENDING: - return "I40E_ERR_MASTER_REQUESTS_PENDING"; + case I40E_ERR_PRIMARY_REQUESTS_PENDING: + return "I40E_ERR_PRIMARY_REQUESTS_PENDING"; case I40E_ERR_INVALID_LINK_SETTINGS: return "I40E_ERR_INVALID_LINK_SETTINGS"; case I40E_ERR_AUTONEG_NOT_COMPLETE: @@ -1624,6 +1626,35 @@ u32 i40e_led_get(struct i40e_hw *hw) return mode; } +/** + * i40e_led_get_blink - return current LED blink setting + * @hw: pointer to the hw struct + * + * The value returned is the LED_BLINK bit as defined in the + * GPIO register definitions (0 = no blink, 1 = do blink). + **/ +bool i40e_led_get_blink(struct i40e_hw *hw) +{ + bool blink = 0; + int i; + + /* as per the documentation GPIO 22-29 are the LED + * GPIO pins named LED0..LED7 + */ + for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) { + u32 gpio_val = i40e_led_is_mine(hw, i); + + if (!gpio_val) + continue; + + blink = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_BLINK_MASK) >> + I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT; + break; + } + + return blink; +} + /** * i40e_led_set - set new on/off mode * @hw: pointer to the hw struct @@ -5661,7 +5692,6 @@ STATIC enum i40e_status_code i40e_validate_filter_settings(struct i40e_hw *hw, struct i40e_filter_control_settings *settings) { u32 fcoe_cntx_size, fcoe_filt_size; - u32 pe_cntx_size, pe_filt_size; u32 fcoe_fmax; u32 val; @@ -5706,8 +5736,6 @@ STATIC enum i40e_status_code i40e_validate_filter_settings(struct i40e_hw *hw, case I40E_HASH_FILTER_SIZE_256K: case I40E_HASH_FILTER_SIZE_512K: case I40E_HASH_FILTER_SIZE_1M: - pe_filt_size = I40E_HASH_FILTER_BASE_SIZE; - pe_filt_size <<= (u32)settings->pe_filt_num; break; default: return I40E_ERR_PARAM; @@ -5724,8 +5752,6 @@ STATIC enum i40e_status_code i40e_validate_filter_settings(struct i40e_hw *hw, case I40E_DMA_CNTX_SIZE_64K: case I40E_DMA_CNTX_SIZE_128K: case I40E_DMA_CNTX_SIZE_256K: - pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE; - pe_cntx_size <<= (u32)settings->pe_cntx_num; break; default: return I40E_ERR_PARAM; @@ -6910,6 +6936,7 @@ enum i40e_status_code i40e_write_phy_register(struct i40e_hw *hw, case I40E_DEV_ID_10G_BASE_T4: case I40E_DEV_ID_10G_BASE_T_BC: case I40E_DEV_ID_5G_BASE_T_BC: + case I40E_DEV_ID_1G_BASE_T_BC: case I40E_DEV_ID_10G_BASE_T_X722: case I40E_DEV_ID_25G_B: case I40E_DEV_ID_25G_SFP28: @@ -6946,7 +6973,9 @@ enum i40e_status_code i40e_read_phy_register(struct i40e_hw *hw, break; case I40E_DEV_ID_10G_BASE_T: case I40E_DEV_ID_10G_BASE_T4: + case I40E_DEV_ID_10G_BASE_T_BC: case I40E_DEV_ID_5G_BASE_T_BC: + case I40E_DEV_ID_1G_BASE_T_BC: case I40E_DEV_ID_10G_BASE_T_X722: case I40E_DEV_ID_25G_B: case I40E_DEV_ID_25G_SFP28: @@ -8198,7 +8227,8 @@ i40e_validate_profile(struct i40e_hw *hw, struct i40e_profile_segment *profile, u32 sec_off; u32 i; - if (track_id == I40E_DDP_TRACKID_INVALID) { + if (track_id == I40E_DDP_TRACKID_INVALID || + track_id == I40E_DDP_TRACKID_RDONLY) { i40e_debug(hw, I40E_DEBUG_PACKAGE, "Invalid track_id\n"); return I40E_NOT_SUPPORTED; } diff --git a/drivers/net/i40e/base/i40e_devids.h b/drivers/net/i40e/base/i40e_devids.h index 02ae7be550..be261423b8 100644 --- a/drivers/net/i40e/base/i40e_devids.h +++ b/drivers/net/i40e/base/i40e_devids.h @@ -26,6 +26,7 @@ #define I40E_DEV_ID_XXV710_N3000 0x0D58 #define I40E_DEV_ID_10G_BASE_T_BC 0x15FF #define I40E_DEV_ID_5G_BASE_T_BC 0x101F +#define I40E_DEV_ID_1G_BASE_T_BC 0x0DD2 #if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT) #define I40E_DEV_ID_VF 0x154C #define I40E_DEV_ID_VF_HV 0x1571 @@ -48,6 +49,7 @@ #define I40E_DEV_ID_1G_BASE_T_X722 0x37D1 #define I40E_DEV_ID_10G_BASE_T_X722 0x37D2 #define I40E_DEV_ID_SFP_I_X722 0x37D3 +#define I40E_DEV_ID_SFP_X722_A 0x0DDA #if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT) #define I40E_DEV_ID_X722_VF 0x37CD #endif /* VF_DRIVER */ diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h index 29c86c7fe8..8c21ac71ab 100644 --- a/drivers/net/i40e/base/i40e_prototype.h +++ b/drivers/net/i40e/base/i40e_prototype.h @@ -73,6 +73,7 @@ const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err); #ifdef PF_DRIVER u32 i40e_led_get(struct i40e_hw *hw); +bool i40e_led_get_blink(struct i40e_hw *hw); void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink); enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on, u16 led_addr, u32 mode); diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h index 75eff845f1..651b0230f7 100644 --- a/drivers/net/i40e/base/i40e_register.h +++ b/drivers/net/i40e/base/i40e_register.h @@ -2395,10 +2395,14 @@ #define I40E_GL_FCOERPDC_MAX_INDEX 143 #define I40E_GL_FCOERPDC_FCOERPDC_SHIFT 0 #define I40E_GL_FCOERPDC_FCOERPDC_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_FCOERPDC_FCOERPDC_SHIFT) -#define I40E_GL_RXERR1_L(_i) (0x00318000 + ((_i) * 8)) /* _i=0...143 */ /* Reset: CORER */ -#define I40E_GL_RXERR1_L_MAX_INDEX 143 -#define I40E_GL_RXERR1_L_FCOEDIFRC_SHIFT 0 -#define I40E_GL_RXERR1_L_FCOEDIFRC_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_RXERR1_L_FCOEDIFRC_SHIFT) +#define I40E_GL_RXERR1H(_i) (0x00318004 + ((_i) * 8)) /* _i=0...143 */ /* Reset: CORER */ +#define I40E_GL_RXERR1H_MAX_INDEX 143 +#define I40E_GL_RXERR1H_RXERR1H_SHIFT 0 +#define I40E_GL_RXERR1H_RXERR1H_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_RXERR1H_RXERR1H_SHIFT) +#define I40E_GL_RXERR1L(_i) (0x00318000 + ((_i) * 8)) /* _i=0...143 */ /* Reset: CORER */ +#define I40E_GL_RXERR1L_MAX_INDEX 143 +#define I40E_GL_RXERR1L_RXERR1L_SHIFT 0 +#define I40E_GL_RXERR1L_RXERR1L_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_RXERR1L_RXERR1L_SHIFT) #define I40E_GL_RXERR2_L(_i) (0x0031c000 + ((_i) * 8)) /* _i=0...143 */ /* Reset: CORER */ #define I40E_GL_RXERR2_L_MAX_INDEX 143 #define I40E_GL_RXERR2_L_FCOEDIXAC_SHIFT 0 @@ -3625,27 +3629,6 @@ #define I40E_GLHMC_PETIMEROBJSZ 0x000C2080 /* Reset: CORER */ #define I40E_GLHMC_PETIMEROBJSZ_PMPETIMEROBJSZ_SHIFT 0 #define I40E_GLHMC_PETIMEROBJSZ_PMPETIMEROBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PETIMEROBJSZ_PMPETIMEROBJSZ_SHIFT) -#define I40E_GLHMC_PEXFBASE(_i) (0x000C4e00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ -#define I40E_GLHMC_PEXFBASE_MAX_INDEX 15 -#define I40E_GLHMC_PEXFBASE_FPMPEXFBASE_SHIFT 0 -#define I40E_GLHMC_PEXFBASE_FPMPEXFBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEXFBASE_FPMPEXFBASE_SHIFT) -#define I40E_GLHMC_PEXFCNT(_i) (0x000C4f00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ -#define I40E_GLHMC_PEXFCNT_MAX_INDEX 15 -#define I40E_GLHMC_PEXFCNT_FPMPEXFCNT_SHIFT 0 -#define I40E_GLHMC_PEXFCNT_FPMPEXFCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEXFCNT_FPMPEXFCNT_SHIFT) -#define I40E_GLHMC_PEXFFLBASE(_i) (0x000C5000 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ -#define I40E_GLHMC_PEXFFLBASE_MAX_INDEX 15 -#define I40E_GLHMC_PEXFFLBASE_FPMPEXFFLBASE_SHIFT 0 -#define I40E_GLHMC_PEXFFLBASE_FPMPEXFFLBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEXFFLBASE_FPMPEXFFLBASE_SHIFT) -#define I40E_GLHMC_PEXFFLMAX 0x000C204c /* Reset: CORER */ -#define I40E_GLHMC_PEXFFLMAX_PMPEXFFLMAX_SHIFT 0 -#define I40E_GLHMC_PEXFFLMAX_PMPEXFFLMAX_MASK I40E_MASK(0x1FFFFFF, I40E_GLHMC_PEXFFLMAX_PMPEXFFLMAX_SHIFT) -#define I40E_GLHMC_PEXFMAX 0x000C2048 /* Reset: CORER */ -#define I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT 0 -#define I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK I40E_MASK(0x3FFFFFF, I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT) -#define I40E_GLHMC_PEXFOBJSZ 0x000C2044 /* Reset: CORER */ -#define I40E_GLHMC_PEXFOBJSZ_PMPEXFOBJSZ_SHIFT 0 -#define I40E_GLHMC_PEXFOBJSZ_PMPEXFOBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PEXFOBJSZ_PMPEXFOBJSZ_SHIFT) #define I40E_GLHMC_PFPESDPART(_i) (0x000C0880 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ #define I40E_GLHMC_PFPESDPART_MAX_INDEX 15 #define I40E_GLHMC_PFPESDPART_PMSDBASE_SHIFT 0 @@ -3766,18 +3749,6 @@ #define I40E_GLHMC_VFPETIMERCNT_MAX_INDEX 31 #define I40E_GLHMC_VFPETIMERCNT_FPMPETIMERCNT_SHIFT 0 #define I40E_GLHMC_VFPETIMERCNT_FPMPETIMERCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPETIMERCNT_FPMPETIMERCNT_SHIFT) -#define I40E_GLHMC_VFPEXFBASE(_i) (0x000Cce00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ -#define I40E_GLHMC_VFPEXFBASE_MAX_INDEX 31 -#define I40E_GLHMC_VFPEXFBASE_FPMPEXFBASE_SHIFT 0 -#define I40E_GLHMC_VFPEXFBASE_FPMPEXFBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEXFBASE_FPMPEXFBASE_SHIFT) -#define I40E_GLHMC_VFPEXFCNT(_i) (0x000Ccf00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ -#define I40E_GLHMC_VFPEXFCNT_MAX_INDEX 31 -#define I40E_GLHMC_VFPEXFCNT_FPMPEXFCNT_SHIFT 0 -#define I40E_GLHMC_VFPEXFCNT_FPMPEXFCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPEXFCNT_FPMPEXFCNT_SHIFT) -#define I40E_GLHMC_VFPEXFFLBASE(_i) (0x000Cd000 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ -#define I40E_GLHMC_VFPEXFFLBASE_MAX_INDEX 31 -#define I40E_GLHMC_VFPEXFFLBASE_FPMPEXFFLBASE_SHIFT 0 -#define I40E_GLHMC_VFPEXFFLBASE_FPMPEXFFLBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEXFFLBASE_FPMPEXFFLBASE_SHIFT) #define I40E_GLHMC_VFSDPART(_i) (0x000C8800 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ #define I40E_GLHMC_VFSDPART_MAX_INDEX 31 #define I40E_GLHMC_VFSDPART_PMSDBASE_SHIFT 0 diff --git a/drivers/net/i40e/base/i40e_status.h b/drivers/net/i40e/base/i40e_status.h index cd72169f14..89b05ede3e 100644 --- a/drivers/net/i40e/base/i40e_status.h +++ b/drivers/net/i40e/base/i40e_status.h @@ -19,7 +19,7 @@ enum i40e_status_code { I40E_ERR_ADAPTER_STOPPED = -9, I40E_ERR_INVALID_MAC_ADDR = -10, I40E_ERR_DEVICE_NOT_SUPPORTED = -11, - I40E_ERR_MASTER_REQUESTS_PENDING = -12, + I40E_ERR_PRIMARY_REQUESTS_PENDING = -12, I40E_ERR_INVALID_LINK_SETTINGS = -13, I40E_ERR_AUTONEG_NOT_COMPLETE = -14, I40E_ERR_RESET_FAILED = -15, diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index f4a3d66759..3cfb0ca430 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -1428,6 +1428,7 @@ struct i40e_eth_stats { u64 tx_broadcast; /* bptc */ u64 tx_discards; /* tdpc */ u64 tx_errors; /* tepc */ + u64 rx_discards_other; /* rxerr1 */ }; /* Statistics collected per VEB per TC */ @@ -1922,6 +1923,10 @@ struct i40e_lldp_variables { #define I40E_PFQF_CTL_0_HASHLUTSIZE_512 0x00010000 /* INPUT SET MASK for RSS, flow director, and flexible payload */ +#define I40E_X722_L3_SRC_SHIFT 49 +#define I40E_X722_L3_SRC_MASK (0x3ULL << I40E_X722_L3_SRC_SHIFT) +#define I40E_X722_L3_DST_SHIFT 41 +#define I40E_X722_L3_DST_MASK (0x3ULL << I40E_X722_L3_DST_SHIFT) #define I40E_L3_SRC_SHIFT 47 #define I40E_L3_SRC_MASK (0x3ULL << I40E_L3_SRC_SHIFT) #define I40E_L3_V6_SRC_SHIFT 43 @@ -1990,6 +1995,8 @@ struct i40e_metadata_segment { #define I40E_DDP_TRACKID_INVALID 0xFFFFFFFF #define I40E_DDP_TRACKID_GRP_MSK 0x00FF0000 #define I40E_DDP_TRACKID_GRP_COMP_ALL 0xFF +#define I40E_DDP_TRACKID_PKGTYPE_MSK 0xFF000000 +#define I40E_DDP_TRACKID_PKGTYPE_RDONLY 0 u32 track_id; char name[I40E_DDP_NAME_SIZE]; }; diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index c0bfff43ee..840df56056 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -386,6 +386,7 @@ static int i40e_set_default_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr); static int i40e_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); +static void i40e_set_mac_max_frame(struct rte_eth_dev *dev, uint16_t size); static int i40e_ethertype_filter_convert( const struct rte_eth_ethertype_filter *input, @@ -427,7 +428,10 @@ static const struct rte_pci_id pci_id_i40e_map[] = { { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) }, { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_B) }, { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_SFP28) }, +#ifdef X722_A0_SUPPORT { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) }, +#endif + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722_A) }, { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_X722) }, { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_X722) }, { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) }, @@ -1709,11 +1713,6 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused) */ i40e_add_tx_flow_control_drop_filter(pf); - /* Set the max frame size to 0x2600 by default, - * in case other drivers changed the default value. - */ - i40e_aq_set_mac_config(hw, I40E_FRAME_SIZE_MAX, TRUE, false, 0, NULL); - /* initialize RSS rule list */ TAILQ_INIT(&pf->rss_config_list); @@ -2364,6 +2363,7 @@ i40e_dev_start(struct rte_eth_dev *dev) uint32_t intr_vector = 0; struct i40e_vsi *vsi; uint16_t nb_rxq, nb_txq; + uint16_t max_frame_size; hw->adapter_stopped = 0; @@ -2502,6 +2502,9 @@ i40e_dev_start(struct rte_eth_dev *dev) "please call hierarchy_commit() " "before starting the port"); + max_frame_size = dev->data->mtu + I40E_ETH_OVERHEAD; + i40e_set_mac_max_frame(dev, max_frame_size); + return I40E_SUCCESS; tx_err: @@ -2848,6 +2851,9 @@ i40e_dev_set_link_down(struct rte_eth_dev *dev) return i40e_phy_conf_link(hw, abilities, speed, false); } +#define CHECK_INTERVAL 100 /* 100ms */ +#define MAX_REPEAT_TIME 10 /* 1s (10 * 100ms) in total */ + static __rte_always_inline void update_link_reg(struct i40e_hw *hw, struct rte_eth_link *link) { @@ -2914,8 +2920,6 @@ static __rte_always_inline void update_link_aq(struct i40e_hw *hw, struct rte_eth_link *link, bool enable_lse, int wait_to_complete) { -#define CHECK_INTERVAL 100 /* 100ms */ -#define MAX_REPEAT_TIME 10 /* 1s (10 * 100ms) in total */ uint32_t rep_cnt = MAX_REPEAT_TIME; struct i40e_link_status link_status; int status; @@ -3202,7 +3206,7 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) &os->eth.rx_unknown_protocol, &ns->eth.rx_unknown_protocol); i40e_stat_update_48(hw, I40E_GL_RXERR1_H(hw->pf_id + I40E_MAX_VF), - I40E_GL_RXERR1_L(hw->pf_id + I40E_MAX_VF), + I40E_GL_RXERR1L(hw->pf_id + I40E_MAX_VF), pf->offset_loaded, &pf->rx_err1_offset, &pf->rx_err1); i40e_stat_update_48_in_64(hw, I40E_GLPRT_GOTCH(hw->port), @@ -6719,6 +6723,7 @@ i40e_dev_handle_aq_msg(struct rte_eth_dev *dev) if (!ret) rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL); + break; default: PMD_DRV_LOG(DEBUG, "Request %u is not supported yet", @@ -12103,6 +12108,31 @@ i40e_cloud_filter_qinq_create(struct i40e_pf *pf) return ret; } +static void +i40e_set_mac_max_frame(struct rte_eth_dev *dev, uint16_t size) +{ + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t rep_cnt = MAX_REPEAT_TIME; + struct rte_eth_link link; + enum i40e_status_code status; + + do { + update_link_reg(hw, &link); + if (link.link_status) + break; + + rte_delay_ms(CHECK_INTERVAL); + } while (--rep_cnt); + + if (link.link_status) { + status = i40e_aq_set_mac_config(hw, size, TRUE, 0, false, NULL); + if (status != I40E_SUCCESS) + PMD_DRV_LOG(ERR, "Failed to set max frame size at port level"); + } else { + PMD_DRV_LOG(ERR, "Set max frame size at port level not applicable on link down"); + } +} + RTE_LOG_REGISTER_SUFFIX(i40e_logtype_init, init, NOTICE); RTE_LOG_REGISTER_SUFFIX(i40e_logtype_driver, driver, NOTICE); #ifdef RTE_ETHDEV_DEBUG_RX diff --git a/drivers/net/i40e/i40e_pf.c b/drivers/net/i40e/i40e_pf.c index ccb3924a5f..43b0fcea6b 100644 --- a/drivers/net/i40e/i40e_pf.c +++ b/drivers/net/i40e/i40e_pf.c @@ -597,14 +597,14 @@ i40e_pf_config_irq_link_list(struct i40e_pf_vf *vf, tempmap = vvm->rxq_map; for (i = 0; i < sizeof(vvm->rxq_map) * BITS_PER_CHAR; i++) { if (tempmap & 0x1) - linklistmap |= (1 << (2 * i)); + linklistmap |= RTE_BIT64(2 * i); tempmap >>= 1; } tempmap = vvm->txq_map; for (i = 0; i < sizeof(vvm->txq_map) * BITS_PER_CHAR; i++) { if (tempmap & 0x1) - linklistmap |= (1 << (2 * i + 1)); + linklistmap |= RTE_BIT64(2 * i + 1); tempmap >>= 1; } diff --git a/drivers/net/i40e/i40e_regs.h b/drivers/net/i40e/i40e_regs.h index b19bb1d5a5..cf62c9dfb7 100644 --- a/drivers/net/i40e/i40e_regs.h +++ b/drivers/net/i40e/i40e_regs.h @@ -586,9 +586,6 @@ static const struct i40e_reg_info i40e_regs_others[] = { {I40E_GLHMC_PEARPMAX, 0, 0, 0, 0, "GLHMC_PEARPMAX"}, {I40E_GLHMC_PEMROBJSZ, 0, 0, 0, 0, "GLHMC_PEMROBJSZ"}, {I40E_GLHMC_PEMRMAX, 0, 0, 0, 0, "GLHMC_PEMRMAX"}, - {I40E_GLHMC_PEXFOBJSZ, 0, 0, 0, 0, "GLHMC_PEXFOBJSZ"}, - {I40E_GLHMC_PEXFMAX, 0, 0, 0, 0, "GLHMC_PEXFMAX"}, - {I40E_GLHMC_PEXFFLMAX, 0, 0, 0, 0, "GLHMC_PEXFFLMAX"}, {I40E_GLHMC_PEQ1OBJSZ, 0, 0, 0, 0, "GLHMC_PEQ1OBJSZ"}, {I40E_GLHMC_PEQ1MAX, 0, 0, 0, 0, "GLHMC_PEQ1MAX"}, {I40E_GLHMC_PEQ1FLMAX, 0, 0, 0, 0, "GLHMC_PEQ1FLMAX"}, @@ -616,9 +613,6 @@ static const struct i40e_reg_info i40e_regs_others[] = { {I40E_GLHMC_APBVTINUSEBASE(0), 15, 4, 0, 0, "GLHMC_APBVTINUSEBASE"}, {I40E_GLHMC_PEMRBASE(0), 15, 4, 0, 0, "GLHMC_PEMRBASE"}, {I40E_GLHMC_PEMRCNT(0), 15, 4, 0, 0, "GLHMC_PEMRCNT"}, - {I40E_GLHMC_PEXFBASE(0), 15, 4, 0, 0, "GLHMC_PEXFBASE"}, - {I40E_GLHMC_PEXFCNT(0), 15, 4, 0, 0, "GLHMC_PEXFCNT"}, - {I40E_GLHMC_PEXFFLBASE(0), 15, 4, 0, 0, "GLHMC_PEXFFLBASE"}, {I40E_GLHMC_PEQ1BASE(0), 15, 4, 0, 0, "GLHMC_PEQ1BASE"}, {I40E_GLHMC_PEQ1CNT(0), 15, 4, 0, 0, "GLHMC_PEQ1CNT"}, {I40E_GLHMC_PEQ1FLBASE(0), 15, 4, 0, 0, "GLHMC_PEQ1FLBASE"}, @@ -653,9 +647,6 @@ static const struct i40e_reg_info i40e_regs_others[] = { {I40E_GLHMC_VFAPBVTINUSEBASE(0), 31, 4, 0, 0, "GLHMC_VFAPBVTINUSEBASE"}, {I40E_GLHMC_VFPEMRBASE(0), 31, 4, 0, 0, "GLHMC_VFPEMRBASE"}, {I40E_GLHMC_VFPEMRCNT(0), 31, 4, 0, 0, "GLHMC_VFPEMRCNT"}, - {I40E_GLHMC_VFPEXFBASE(0), 31, 4, 0, 0, "GLHMC_VFPEXFBASE"}, - {I40E_GLHMC_VFPEXFCNT(0), 31, 4, 0, 0, "GLHMC_VFPEXFCNT"}, - {I40E_GLHMC_VFPEXFFLBASE(0), 31, 4, 0, 0, "GLHMC_VFPEXFFLBASE"}, {I40E_GLHMC_VFPEQ1BASE(0), 31, 4, 0, 0, "GLHMC_VFPEQ1BASE"}, {I40E_GLHMC_VFPEQ1CNT(0), 31, 4, 0, 0, "GLHMC_VFPEQ1CNT"}, {I40E_GLHMC_VFPEQ1FLBASE(0), 31, 4, 0, 0, "GLHMC_VFPEQ1FLBASE"}, @@ -896,7 +887,7 @@ static const struct i40e_reg_info i40e_regs_others[] = { {I40E_GL_FCOEDDPC(0), 143, 8, 0, 0, "GL_FCOEDDPC"}, {I40E_GL_FCOECRC(0), 143, 8, 0, 0, "GL_FCOECRC"}, {I40E_GL_FCOEPRC(0), 143, 8, 0, 0, "GL_FCOEPRC"}, - {I40E_GL_RXERR1_L(0), 143, 8, 0, 0, "GL_RXERR1_L"}, + {I40E_GL_RXERR1L(0), 143, 8, 0, 0, "GL_RXERR1_L"}, {I40E_GL_FCOEDIFEC(0), 143, 8, 0, 0, "GL_FCOEDIFEC"}, {I40E_GL_RXERR2_L(0), 143, 8, 0, 0, "GL_RXERR2_L"}, {I40E_GL_FCOEDWRCL(0), 143, 8, 0, 0, "GL_FCOEDWRCL"}, diff --git a/drivers/net/i40e/i40e_rxtx_vec_common.h b/drivers/net/i40e/i40e_rxtx_vec_common.h index f9a7f46550..959832ed6a 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_common.h +++ b/drivers/net/i40e/i40e_rxtx_vec_common.h @@ -103,7 +103,7 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq) if (txq->offloads & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE) { for (i = 0; i < n; i++) { free[i] = txep[i].mbuf; - txep[i].mbuf = NULL; + /* no need to reset txep[i].mbuf in vector path */ } rte_mempool_put_bulk(free[0]->pool, (void **)free, n); goto done; diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c index 377d7bc7a6..502b952837 100644 --- a/drivers/net/iavf/iavf_ethdev.c +++ b/drivers/net/iavf/iavf_ethdev.c @@ -2278,6 +2278,9 @@ iavf_init_vf(struct rte_eth_dev *dev) } } + if (vf->vsi_res->num_queue_pairs > IAVF_MAX_NUM_QUEUES_DFLT) + vf->lv_enabled = true; + if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) { if (iavf_get_supported_rxdid(adapter) != 0) { PMD_INIT_LOG(ERR, "failed to do get supported rxdid"); diff --git a/drivers/net/iavf/iavf_ipsec_crypto.c b/drivers/net/iavf/iavf_ipsec_crypto.c index 884169e061..144d8cd520 100644 --- a/drivers/net/iavf/iavf_ipsec_crypto.c +++ b/drivers/net/iavf/iavf_ipsec_crypto.c @@ -614,7 +614,7 @@ set_session_parameter(struct iavf_security_ctx *iavf_sctx, if (conf->crypto_xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC) { sess->block_sz = get_auth_blocksize(iavf_sctx, conf->crypto_xform->auth.algo); - sess->iv_sz = conf->crypto_xform->auth.iv.length; + sess->iv_sz = sizeof(uint64_t); /* iv len inc. salt */ sess->icv_sz = conf->crypto_xform->auth.digest_length; } else { sess->block_sz = get_cipher_blocksize(iavf_sctx, @@ -736,7 +736,9 @@ iavf_ipsec_crypto_inbound_security_policy_add(struct iavf_adapter *adapter, uint8_t is_v4, rte_be32_t v4_dst_addr, uint8_t *v6_dst_addr, - uint8_t drop) + uint8_t drop, + bool is_udp, + uint16_t udp_port) { struct inline_ipsec_msg *request = NULL, *response = NULL; size_t request_len, response_len; @@ -781,6 +783,8 @@ iavf_ipsec_crypto_inbound_security_policy_add(struct iavf_adapter *adapter, /** Traffic Class/Congestion Domain currently not support */ request->ipsec_data.sp_cfg->set_tc = 0; request->ipsec_data.sp_cfg->cgd = 0; + request->ipsec_data.sp_cfg->is_udp = is_udp; + request->ipsec_data.sp_cfg->udp_port = htons(udp_port); response_len = sizeof(struct inline_ipsec_msg) + sizeof(struct virtchnl_ipsec_sp_cfg_resp); @@ -1352,6 +1356,8 @@ iavf_ipsec_crypto_set_security_capabililites(struct iavf_security_ctx capabilities = rte_zmalloc("crypto_cap", sizeof(struct rte_cryptodev_capabilities) * (number_of_capabilities + 1), 0); + if (!capabilities) + return -ENOMEM; capabilities[number_of_capabilities].op = RTE_CRYPTO_OP_TYPE_UNDEFINED; /** @@ -1551,8 +1557,8 @@ iavf_security_ctx_destroy(struct iavf_adapter *adapter) rte_free(iavf_sctx); rte_free(sctx); - iavf_sctx = NULL; - sctx = NULL; + adapter->security_ctx = NULL; + adapter->vf.eth_dev->security_ctx = NULL; return 0; } @@ -1623,6 +1629,7 @@ struct iavf_ipsec_flow_item { struct rte_ipv6_hdr ipv6_hdr; }; struct rte_udp_hdr udp_hdr; + uint8_t is_udp; }; static void @@ -1735,6 +1742,7 @@ iavf_ipsec_flow_item_parse(struct rte_eth_dev *ethdev, parse_udp_item((const struct rte_flow_item_udp *) pattern[2].spec, &ipsec_flow->udp_hdr); + ipsec_flow->is_udp = true; ipsec_flow->spi = ((const struct rte_flow_item_esp *) pattern[3].spec)->hdr.spi; @@ -1804,7 +1812,9 @@ iavf_ipsec_flow_create(struct iavf_adapter *ad, 1, ipsec_flow->ipv4_hdr.dst_addr, NULL, - 0); + 0, + ipsec_flow->is_udp, + ipsec_flow->udp_hdr.dst_port); } else { ipsec_flow->id = iavf_ipsec_crypto_inbound_security_policy_add(ad, @@ -1812,7 +1822,9 @@ iavf_ipsec_flow_create(struct iavf_adapter *ad, 0, 0, ipsec_flow->ipv6_hdr.dst_addr, - 0); + 0, + ipsec_flow->is_udp, + ipsec_flow->udp_hdr.dst_port); } if (ipsec_flow->id < 1) { diff --git a/drivers/net/iavf/iavf_ipsec_crypto.h b/drivers/net/iavf/iavf_ipsec_crypto.h index 4e4c8798ec..d9652edcab 100644 --- a/drivers/net/iavf/iavf_ipsec_crypto.h +++ b/drivers/net/iavf/iavf_ipsec_crypto.h @@ -145,7 +145,9 @@ iavf_ipsec_crypto_inbound_security_policy_add(struct iavf_adapter *adapter, uint8_t is_v4, rte_be32_t v4_dst_addr, uint8_t *v6_dst_addr, - uint8_t drop); + uint8_t drop, + bool is_udp, + uint16_t udp_port); /** * Delete inbound security policy rule from hardware diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c index 154472c50f..bb6d4c6f50 100644 --- a/drivers/net/iavf/iavf_rxtx.c +++ b/drivers/net/iavf/iavf_rxtx.c @@ -476,54 +476,59 @@ iavf_rxd_to_pkt_fields_by_comms_aux_v2(struct iavf_rx_queue *rxq, #endif } +static const +iavf_rxd_to_pkt_fields_t rxd_to_pkt_fields_ops[IAVF_RXDID_LAST + 1] = { + [IAVF_RXDID_LEGACY_0] = iavf_rxd_to_pkt_fields_by_comms_ovs, + [IAVF_RXDID_LEGACY_1] = iavf_rxd_to_pkt_fields_by_comms_ovs, + [IAVF_RXDID_COMMS_AUX_VLAN] = iavf_rxd_to_pkt_fields_by_comms_aux_v1, + [IAVF_RXDID_COMMS_AUX_IPV4] = iavf_rxd_to_pkt_fields_by_comms_aux_v1, + [IAVF_RXDID_COMMS_AUX_IPV6] = iavf_rxd_to_pkt_fields_by_comms_aux_v1, + [IAVF_RXDID_COMMS_AUX_IPV6_FLOW] = + iavf_rxd_to_pkt_fields_by_comms_aux_v1, + [IAVF_RXDID_COMMS_AUX_TCP] = iavf_rxd_to_pkt_fields_by_comms_aux_v1, + [IAVF_RXDID_COMMS_AUX_IP_OFFSET] = + iavf_rxd_to_pkt_fields_by_comms_aux_v2, + [IAVF_RXDID_COMMS_IPSEC_CRYPTO] = + iavf_rxd_to_pkt_fields_by_comms_aux_v2, + [IAVF_RXDID_COMMS_OVS_1] = iavf_rxd_to_pkt_fields_by_comms_ovs, +}; + static void iavf_select_rxd_to_pkt_fields_handler(struct iavf_rx_queue *rxq, uint32_t rxdid) { + rxq->rxdid = rxdid; + switch (rxdid) { case IAVF_RXDID_COMMS_AUX_VLAN: rxq->xtr_ol_flag = rte_pmd_ifd_dynflag_proto_xtr_vlan_mask; - rxq->rxd_to_pkt_fields = - iavf_rxd_to_pkt_fields_by_comms_aux_v1; break; case IAVF_RXDID_COMMS_AUX_IPV4: rxq->xtr_ol_flag = rte_pmd_ifd_dynflag_proto_xtr_ipv4_mask; - rxq->rxd_to_pkt_fields = - iavf_rxd_to_pkt_fields_by_comms_aux_v1; break; case IAVF_RXDID_COMMS_AUX_IPV6: rxq->xtr_ol_flag = rte_pmd_ifd_dynflag_proto_xtr_ipv6_mask; - rxq->rxd_to_pkt_fields = - iavf_rxd_to_pkt_fields_by_comms_aux_v1; break; case IAVF_RXDID_COMMS_AUX_IPV6_FLOW: rxq->xtr_ol_flag = rte_pmd_ifd_dynflag_proto_xtr_ipv6_flow_mask; - rxq->rxd_to_pkt_fields = - iavf_rxd_to_pkt_fields_by_comms_aux_v1; break; case IAVF_RXDID_COMMS_AUX_TCP: rxq->xtr_ol_flag = rte_pmd_ifd_dynflag_proto_xtr_tcp_mask; - rxq->rxd_to_pkt_fields = - iavf_rxd_to_pkt_fields_by_comms_aux_v1; break; case IAVF_RXDID_COMMS_AUX_IP_OFFSET: rxq->xtr_ol_flag = rte_pmd_ifd_dynflag_proto_xtr_ip_offset_mask; - rxq->rxd_to_pkt_fields = - iavf_rxd_to_pkt_fields_by_comms_aux_v2; break; case IAVF_RXDID_COMMS_IPSEC_CRYPTO: rxq->xtr_ol_flag = rte_pmd_ifd_dynflag_proto_xtr_ipsec_crypto_said_mask; - rxq->rxd_to_pkt_fields = - iavf_rxd_to_pkt_fields_by_comms_aux_v2; break; case IAVF_RXDID_COMMS_OVS_1: - rxq->rxd_to_pkt_fields = iavf_rxd_to_pkt_fields_by_comms_ovs; + case IAVF_RXDID_LEGACY_0: + case IAVF_RXDID_LEGACY_1: break; default: - /* update this according to the RXDID for FLEX_DESC_NONE */ - rxq->rxd_to_pkt_fields = iavf_rxd_to_pkt_fields_by_comms_ovs; + rxq->rxdid = IAVF_RXDID_COMMS_OVS_1; break; } @@ -1484,7 +1489,7 @@ iavf_recv_pkts_flex_rxd(void *rx_queue, iavf_flex_rxd_to_vlan_tci(rxm, &rxd); iavf_flex_rxd_to_ipsec_crypto_status(rxm, &rxd, &rxq->stats.ipsec_crypto); - rxq->rxd_to_pkt_fields(rxq, rxm, &rxd); + rxd_to_pkt_fields_ops[rxq->rxdid](rxq, rxm, &rxd); pkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0); rxm->ol_flags |= pkt_flags; @@ -1628,7 +1633,7 @@ iavf_recv_scattered_pkts_flex_rxd(void *rx_queue, struct rte_mbuf **rx_pkts, iavf_flex_rxd_to_vlan_tci(first_seg, &rxd); iavf_flex_rxd_to_ipsec_crypto_status(first_seg, &rxd, &rxq->stats.ipsec_crypto); - rxq->rxd_to_pkt_fields(rxq, first_seg, &rxd); + rxd_to_pkt_fields_ops[rxq->rxdid](rxq, first_seg, &rxd); pkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0); first_seg->ol_flags |= pkt_flags; @@ -1819,7 +1824,7 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq) struct rte_mbuf *mb; uint16_t stat_err0; uint16_t pkt_len; - int32_t s[IAVF_LOOK_AHEAD], nb_dd; + int32_t s[IAVF_LOOK_AHEAD], var, nb_dd; int32_t i, j, nb_rx = 0; uint64_t pkt_flags; const uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl; @@ -1844,9 +1849,27 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq) rte_smp_rmb(); - /* Compute how many status bits were set */ - for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) - nb_dd += s[j] & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S); + /* Compute how many contiguous DD bits were set */ + for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) { + var = s[j] & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S); +#ifdef RTE_ARCH_ARM + /* For Arm platforms, count only contiguous descriptors + * whose DD bit is set to 1. On Arm platforms, reads of + * descriptors can be reordered. Since the CPU may + * be reading the descriptors as the NIC updates them + * in memory, it is possbile that the DD bit for a + * descriptor earlier in the queue is read as not set + * while the DD bit for a descriptor later in the queue + * is read as set. + */ + if (var) + nb_dd += 1; + else + break; +#else + nb_dd += var; +#endif + } nb_rx += nb_dd; @@ -1868,7 +1891,7 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq) iavf_flex_rxd_to_vlan_tci(mb, &rxdp[j]); iavf_flex_rxd_to_ipsec_crypto_status(mb, &rxdp[j], &rxq->stats.ipsec_crypto); - rxq->rxd_to_pkt_fields(rxq, mb, &rxdp[j]); + rxd_to_pkt_fields_ops[rxq->rxdid](rxq, mb, &rxdp[j]); stat_err0 = rte_le_to_cpu_16(rxdp[j].wb.status_error0); pkt_flags = iavf_flex_rxd_error_to_pkt_flags(stat_err0); @@ -1898,7 +1921,7 @@ iavf_rx_scan_hw_ring(struct iavf_rx_queue *rxq) uint16_t pkt_len; uint64_t qword1; uint32_t rx_status; - int32_t s[IAVF_LOOK_AHEAD], nb_dd; + int32_t s[IAVF_LOOK_AHEAD], var, nb_dd; int32_t i, j, nb_rx = 0; uint64_t pkt_flags; const uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl; @@ -1929,9 +1952,27 @@ iavf_rx_scan_hw_ring(struct iavf_rx_queue *rxq) rte_smp_rmb(); - /* Compute how many status bits were set */ - for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) - nb_dd += s[j] & (1 << IAVF_RX_DESC_STATUS_DD_SHIFT); + /* Compute how many contiguous DD bits were set */ + for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) { + var = s[j] & (1 << IAVF_RX_DESC_STATUS_DD_SHIFT); +#ifdef RTE_ARCH_ARM + /* For Arm platforms, count only contiguous descriptors + * whose DD bit is set to 1. On Arm platforms, reads of + * descriptors can be reordered. Since the CPU may + * be reading the descriptors as the NIC updates them + * in memory, it is possbile that the DD bit for a + * descriptor earlier in the queue is read as not set + * while the DD bit for a descriptor later in the queue + * is read as set. + */ + if (var) + nb_dd += 1; + else + break; +#else + nb_dd += var; +#endif + } nb_rx += nb_dd; @@ -2439,6 +2480,14 @@ iavf_fill_data_desc(volatile struct iavf_tx_desc *desc, if (m->ol_flags & RTE_MBUF_F_TX_SEC_OFFLOAD) hdrlen += ipseclen; bufsz = hdrlen + tlen; + } else if ((m->ol_flags & RTE_MBUF_F_TX_SEC_OFFLOAD) && + (m->ol_flags & (RTE_MBUF_F_TX_TCP_SEG | + RTE_MBUF_F_TX_UDP_SEG))) { + hdrlen += m->outer_l3_len + m->l3_len + ipseclen; + if (m->ol_flags & RTE_MBUF_F_TX_L4_MASK) + hdrlen += m->l4_len; + bufsz = hdrlen + tlen; + } else { bufsz = m->data_len; } diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h index b610176b30..503bed9b82 100644 --- a/drivers/net/iavf/iavf_rxtx.h +++ b/drivers/net/iavf/iavf_rxtx.h @@ -216,10 +216,8 @@ struct iavf_rx_queue { #define IAVF_RX_FLAGS_VLAN_TAG_LOC_L2TAG2_2 BIT(1) uint8_t proto_xtr; /* protocol extraction type */ uint64_t xtr_ol_flag; - /* flexible descriptor metadata extraction offload flag */ - iavf_rxd_to_pkt_fields_t rxd_to_pkt_fields; - /* handle flexible descriptor by RXDID */ struct iavf_rx_queue_stats stats; + /* flexible descriptor metadata extraction offload flag */ uint64_t offloads; }; @@ -415,45 +413,6 @@ enum iavf_rxdid { IAVF_RXDID_LAST = 63, }; -enum iavf_rx_flex_desc_status_error_0_bits { - /* Note: These are predefined bit offsets */ - IAVF_RX_FLEX_DESC_STATUS0_DD_S = 0, - IAVF_RX_FLEX_DESC_STATUS0_EOF_S, - IAVF_RX_FLEX_DESC_STATUS0_HBO_S, - IAVF_RX_FLEX_DESC_STATUS0_L3L4P_S, - IAVF_RX_FLEX_DESC_STATUS0_XSUM_IPE_S, - IAVF_RX_FLEX_DESC_STATUS0_XSUM_L4E_S, - IAVF_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S, - IAVF_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S, - IAVF_RX_FLEX_DESC_STATUS0_LPBK_S, - IAVF_RX_FLEX_DESC_STATUS0_IPV6EXADD_S, - IAVF_RX_FLEX_DESC_STATUS0_RXE_S, - IAVF_RX_FLEX_DESC_STATUS0_CRCP_S, - IAVF_RX_FLEX_DESC_STATUS0_RSS_VALID_S, - IAVF_RX_FLEX_DESC_STATUS0_L2TAG1P_S, - IAVF_RX_FLEX_DESC_STATUS0_XTRMD0_VALID_S, - IAVF_RX_FLEX_DESC_STATUS0_XTRMD1_VALID_S, - IAVF_RX_FLEX_DESC_STATUS0_LAST /* this entry must be last!!! */ -}; - -enum iavf_rx_flex_desc_status_error_1_bits { - /* Note: These are predefined bit offsets */ - /* Bits 3:0 are reserved for inline ipsec status */ - IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_0 = 0, - IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_1, - IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_2, - IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_3, - IAVF_RX_FLEX_DESC_STATUS1_NAT_S, - IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_PROCESSED, - /* [10:6] reserved */ - IAVF_RX_FLEX_DESC_STATUS1_L2TAG2P_S = 11, - IAVF_RX_FLEX_DESC_STATUS1_XTRMD2_VALID_S = 12, - IAVF_RX_FLEX_DESC_STATUS1_XTRMD3_VALID_S = 13, - IAVF_RX_FLEX_DESC_STATUS1_XTRMD4_VALID_S = 14, - IAVF_RX_FLEX_DESC_STATUS1_XTRMD5_VALID_S = 15, - IAVF_RX_FLEX_DESC_STATUS1_LAST /* this entry must be last!!! */ -}; - #define IAVF_RX_FLEX_DESC_IPSEC_CRYPTO_STATUS_MASK ( \ BIT(IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_0) | \ BIT(IAVF_RX_FLEX_DESC_STATUS1_IPSEC_CRYPTO_STATUS_1) | \ diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx2.c b/drivers/net/iavf/iavf_rxtx_vec_avx2.c index b6ef1aea77..d6243b96e2 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_avx2.c +++ b/drivers/net/iavf/iavf_rxtx_vec_avx2.c @@ -1450,9 +1450,6 @@ iavf_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts, uint64_t flags = IAVF_TX_DESC_CMD_EOP | IAVF_TX_DESC_CMD_ICRC; uint64_t rs = IAVF_TX_DESC_CMD_RS | flags; - /* cross rx_thresh boundary is not allowed */ - nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh); - if (txq->nb_free < txq->free_thresh) iavf_tx_free_bufs(txq); @@ -1516,6 +1513,7 @@ iavf_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts, while (nb_pkts) { uint16_t ret, num; + /* cross rs_thresh boundary is not allowed */ num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh); ret = iavf_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx], num); diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx512.c b/drivers/net/iavf/iavf_rxtx_vec_avx512.c index 6ff38ac368..7319d4cb65 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_avx512.c +++ b/drivers/net/iavf/iavf_rxtx_vec_avx512.c @@ -1907,9 +1907,6 @@ iavf_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts, uint64_t flags = IAVF_TX_DESC_CMD_EOP | IAVF_TX_DESC_CMD_ICRC; uint64_t rs = IAVF_TX_DESC_CMD_RS | flags; - /* cross rx_thresh boundary is not allowed */ - nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh); - if (txq->nb_free < txq->free_thresh) iavf_tx_free_bufs_avx512(txq); @@ -1975,6 +1972,7 @@ iavf_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts, while (nb_pkts) { uint16_t ret, num; + /* cross rs_thresh boundary is not allowed */ num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh); ret = iavf_xmit_fixed_burst_vec_avx512(tx_queue, &tx_pkts[nb_tx], num, offload); diff --git a/drivers/net/iavf/iavf_rxtx_vec_sse.c b/drivers/net/iavf/iavf_rxtx_vec_sse.c index 1bac59bf0e..9cbdcbd43b 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_sse.c +++ b/drivers/net/iavf/iavf_rxtx_vec_sse.c @@ -1120,9 +1120,6 @@ iavf_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts, uint64_t rs = IAVF_TX_DESC_CMD_RS | flags; int i; - /* cross rx_thresh boundary is not allowed */ - nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh); - if (txq->nb_free < txq->free_thresh) iavf_tx_free_bufs(txq); @@ -1189,6 +1186,7 @@ iavf_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts, while (nb_pkts) { uint16_t ret, num; + /* cross rs_thresh boundary is not allowed */ num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh); ret = iavf_xmit_fixed_burst_vec(tx_queue, &tx_pkts[nb_tx], num); nb_tx += ret; diff --git a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c index 145b059837..b9871e9f4b 100644 --- a/drivers/net/iavf/iavf_vchnl.c +++ b/drivers/net/iavf/iavf_vchnl.c @@ -165,7 +165,7 @@ iavf_execute_vf_cmd(struct iavf_adapter *adapter, struct iavf_cmd_info *args, return -1; } - ret = iavf_aq_send_msg_to_pf(hw, args->ops, IAVF_SUCCESS, + ret = iavf_aq_send_msg_to_pf(hw, args->ops, VIRTCHNL_STATUS_SUCCESS, args->in_args, args->in_args_size, NULL); if (ret) { PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops); @@ -502,7 +502,7 @@ iavf_get_vf_resource(struct iavf_adapter *adapter) VIRTCHNL_VF_OFFLOAD_VLAN_V2 | VIRTCHNL_VF_LARGE_NUM_QPAIRS | VIRTCHNL_VF_OFFLOAD_QOS | -+ VIRTCHNL_VF_OFFLOAD_INLINE_IPSEC_CRYPTO; + VIRTCHNL_VF_OFFLOAD_INLINE_IPSEC_CRYPTO; args.in_args = (uint8_t *)∩︀ args.in_args_size = sizeof(caps); diff --git a/drivers/net/ice/ice_dcf.c b/drivers/net/ice/ice_dcf.c index cca1d7bf46..94099b0685 100644 --- a/drivers/net/ice/ice_dcf.c +++ b/drivers/net/ice/ice_dcf.c @@ -40,7 +40,7 @@ static __rte_always_inline int ice_dcf_send_cmd_req_no_irq(struct ice_dcf_hw *hw, enum virtchnl_ops op, uint8_t *req_msg, uint16_t req_msglen) { - return iavf_aq_send_msg_to_pf(&hw->avf, op, IAVF_SUCCESS, + return iavf_aq_send_msg_to_pf(&hw->avf, op, VIRTCHNL_STATUS_SUCCESS, req_msg, req_msglen, NULL); } @@ -105,7 +105,7 @@ static __rte_always_inline int ice_dcf_vc_cmd_send(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd) { return iavf_aq_send_msg_to_pf(&hw->avf, - cmd->v_op, IAVF_SUCCESS, + cmd->v_op, VIRTCHNL_STATUS_SUCCESS, cmd->req_msg, cmd->req_msglen, NULL); }