From patchwork Mon May 16 06:41:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Ke1X" X-Patchwork-Id: 111166 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 12BE3A00BE; Mon, 16 May 2022 08:47:57 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AC12840A7A; Mon, 16 May 2022 08:47:56 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id 0C98840A79 for ; Mon, 16 May 2022 08:47:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652683675; x=1684219675; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FjDmap38oLlHzddgICxzKBFKaPG2Sxb7Bve29EuIWqU=; b=YeTQT2AqEaji1wpNmr0IGsLQQNXNsCvWl4aQ/Oqu+8rCbab4nqazIVNb 8aAlZMkDC9kJANlSq0WMZwHyPjJw3IJxsieBo/Jw2qrgfUohi8CnTMaYu JflKnwir2KbquYDrBEuXsBd/gUAcm2Zl8wuQMESk7cn8QGzh211ERTRjG 5DZladCCzTsRj53SLdMCC3qmBLE3VZDtSMPspsFDPJsaBhCHfx2ndjyxx HKfCrhHnNpoHshlMNMSUP7gnxvYSDgR3t8OSwgDGBiQiIpe40Fti109nF wsKq0R4iX4cEaCM6ACY9/q/7RwDC4d1BzB9BDTsXldGkULrNvDbnOjj/E Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10348"; a="268325607" X-IronPort-AV: E=Sophos;i="5.91,229,1647327600"; d="scan'208";a="268325607" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 May 2022 23:47:52 -0700 X-IronPort-AV: E=Sophos;i="5.91,229,1647327600"; d="scan'208";a="596377089" Received: from unknown (HELO localhost.localdomain) ([10.239.251.104]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 May 2022 23:47:50 -0700 From: Ke Zhang To: xiaoyun.li@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com, dev@dpdk.org Cc: Ke Zhang Subject: [PATCH v6] fix mbuf release function point corrupt in multi-process Date: Mon, 16 May 2022 06:41:06 +0000 Message-Id: <20220516064106.231741-1-ke1x.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220512074443.183631-1-ke1x.zhang@intel.com> References: <20220512074443.183631-1-ke1x.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In the multiple process environment, the subprocess operates on the shared memory and changes the function pointer of the main process, resulting in the failure to find the address of the function when main process releasing, resulting in crash. Signed-off-by: Ke Zhang --- drivers/net/iavf/iavf_rxtx.c | 35 ++++++++++++++++--------- drivers/net/iavf/iavf_rxtx.h | 11 ++++++++ drivers/net/iavf/iavf_rxtx_vec_avx512.c | 8 ++---- drivers/net/iavf/iavf_rxtx_vec_sse.c | 16 +++-------- 4 files changed, 40 insertions(+), 30 deletions(-) diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c index 16e8d021f9..adcc874171 100644 --- a/drivers/net/iavf/iavf_rxtx.c +++ b/drivers/net/iavf/iavf_rxtx.c @@ -362,12 +362,23 @@ release_txq_mbufs(struct iavf_tx_queue *txq) } } -static const struct iavf_rxq_ops def_rxq_ops = { - .release_mbufs = release_rxq_mbufs, +static const +struct iavf_rxq_ops iavf_rxq_release_mbufs_ops[] = { + [IAVF_REL_MBUFS_DEFAULT].release_mbufs = release_rxq_mbufs, +#ifdef RTE_ARCH_X86 + [IAVF_REL_MBUFS_SSE_VEC].release_mbufs = iavf_rx_queue_release_mbufs_sse, +#endif }; -static const struct iavf_txq_ops def_txq_ops = { - .release_mbufs = release_txq_mbufs, +static const +struct iavf_txq_ops iavf_txq_release_mbufs_ops[] = { + [IAVF_REL_MBUFS_DEFAULT].release_mbufs = release_txq_mbufs, +#ifdef RTE_ARCH_X86 + [IAVF_REL_MBUFS_SSE_VEC].release_mbufs = iavf_tx_queue_release_mbufs_sse, +#endif +#ifdef CC_AVX512_SUPPORT + [IAVF_REL_MBUFS_AVX512_VEC].release_mbufs = iavf_tx_queue_release_mbufs_avx512, +#endif }; static inline void @@ -674,7 +685,7 @@ iavf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, rxq->q_set = true; dev->data->rx_queues[queue_idx] = rxq; rxq->qrx_tail = hw->hw_addr + IAVF_QRX_TAIL1(rxq->queue_id); - rxq->ops = &def_rxq_ops; + rxq->rel_mbufs_type = IAVF_REL_MBUFS_DEFAULT; if (check_rx_bulk_allow(rxq) == true) { PMD_INIT_LOG(DEBUG, "Rx Burst Bulk Alloc Preconditions are " @@ -811,7 +822,7 @@ iavf_dev_tx_queue_setup(struct rte_eth_dev *dev, txq->q_set = true; dev->data->tx_queues[queue_idx] = txq; txq->qtx_tail = hw->hw_addr + IAVF_QTX_TAIL1(queue_idx); - txq->ops = &def_txq_ops; + txq->rel_mbufs_type = IAVF_REL_MBUFS_DEFAULT; if (check_tx_vec_allow(txq) == false) { struct iavf_adapter *ad = @@ -943,7 +954,7 @@ iavf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) } rxq = dev->data->rx_queues[rx_queue_id]; - rxq->ops->release_mbufs(rxq); + iavf_rxq_release_mbufs_ops[rxq->rel_mbufs_type].release_mbufs(rxq); reset_rx_queue(rxq); dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; @@ -971,7 +982,7 @@ iavf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) } txq = dev->data->tx_queues[tx_queue_id]; - txq->ops->release_mbufs(txq); + iavf_txq_release_mbufs_ops[txq->rel_mbufs_type].release_mbufs(txq); reset_tx_queue(txq); dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; @@ -986,7 +997,7 @@ iavf_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) if (!q) return; - q->ops->release_mbufs(q); + iavf_rxq_release_mbufs_ops[q->rel_mbufs_type].release_mbufs(q); rte_free(q->sw_ring); rte_memzone_free(q->mz); rte_free(q); @@ -1000,7 +1011,7 @@ iavf_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) if (!q) return; - q->ops->release_mbufs(q); + iavf_txq_release_mbufs_ops[q->rel_mbufs_type].release_mbufs(q); rte_free(q->sw_ring); rte_memzone_free(q->mz); rte_free(q); @@ -1034,7 +1045,7 @@ iavf_stop_queues(struct rte_eth_dev *dev) txq = dev->data->tx_queues[i]; if (!txq) continue; - txq->ops->release_mbufs(txq); + iavf_txq_release_mbufs_ops[txq->rel_mbufs_type].release_mbufs(txq); reset_tx_queue(txq); dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED; } @@ -1042,7 +1053,7 @@ iavf_stop_queues(struct rte_eth_dev *dev) rxq = dev->data->rx_queues[i]; if (!rxq) continue; - rxq->ops->release_mbufs(rxq); + iavf_rxq_release_mbufs_ops[rxq->rel_mbufs_type].release_mbufs(rxq); reset_rx_queue(rxq); dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED; } diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h index bf8aebbce8..48cc0da6f5 100644 --- a/drivers/net/iavf/iavf_rxtx.h +++ b/drivers/net/iavf/iavf_rxtx.h @@ -187,6 +187,7 @@ struct iavf_rx_queue { struct rte_mbuf *pkt_last_seg; /* last segment of current packet */ struct rte_mbuf fake_mbuf; /* dummy mbuf */ uint8_t rxdid; + uint8_t rel_mbufs_type; /* used for VPMD */ uint16_t rxrearm_nb; /* number of remaining to be re-armed */ @@ -246,6 +247,7 @@ struct iavf_tx_queue { uint16_t last_desc_cleaned; /* last desc have been cleaned*/ uint16_t free_thresh; uint16_t rs_thresh; + uint8_t rel_mbufs_type; uint16_t port_id; uint16_t queue_id; @@ -389,6 +391,12 @@ struct iavf_32b_rx_flex_desc_comms_ipsec { __le32 ipsec_said; }; +enum iavf_rxtx_rel_mbufs_type { + IAVF_REL_MBUFS_DEFAULT = 0, + IAVF_REL_MBUFS_SSE_VEC = 1, + IAVF_REL_MBUFS_AVX512_VEC = 2, +}; + /* Receive Flex Descriptor profile IDs: There are a total * of 64 profiles where profile IDs 0/1 are for legacy; and * profiles 2-63 are flex profiles that can be programmed @@ -692,6 +700,9 @@ int iavf_txq_vec_setup_avx512(struct iavf_tx_queue *txq); uint8_t iavf_proto_xtr_type_to_rxdid(uint8_t xtr_type); void iavf_set_default_ptype_table(struct rte_eth_dev *dev); +void iavf_tx_queue_release_mbufs_avx512(struct iavf_tx_queue *txq); +void iavf_rx_queue_release_mbufs_sse(struct iavf_rx_queue *rxq); +void iavf_tx_queue_release_mbufs_sse(struct iavf_tx_queue *txq); static inline void iavf_dump_rx_descriptor(struct iavf_rx_queue *rxq, diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx512.c b/drivers/net/iavf/iavf_rxtx_vec_avx512.c index 7319d4cb65..3bfec63851 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_avx512.c +++ b/drivers/net/iavf/iavf_rxtx_vec_avx512.c @@ -1992,7 +1992,7 @@ iavf_xmit_pkts_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts, return iavf_xmit_pkts_vec_avx512_cmn(tx_queue, tx_pkts, nb_pkts, false); } -static inline void +void __rte_cold iavf_tx_queue_release_mbufs_avx512(struct iavf_tx_queue *txq) { unsigned int i; @@ -2012,14 +2012,10 @@ iavf_tx_queue_release_mbufs_avx512(struct iavf_tx_queue *txq) } } -static const struct iavf_txq_ops avx512_vec_txq_ops = { - .release_mbufs = iavf_tx_queue_release_mbufs_avx512, -}; - int __rte_cold iavf_txq_vec_setup_avx512(struct iavf_tx_queue *txq) { - txq->ops = &avx512_vec_txq_ops; + txq->rel_mbufs_type = IAVF_REL_MBUFS_AVX512_VEC; return 0; } diff --git a/drivers/net/iavf/iavf_rxtx_vec_sse.c b/drivers/net/iavf/iavf_rxtx_vec_sse.c index 717a227b2c..4a5232c1d2 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_sse.c +++ b/drivers/net/iavf/iavf_rxtx_vec_sse.c @@ -1198,37 +1198,29 @@ iavf_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts, return nb_tx; } -static void __rte_cold +void __rte_cold iavf_rx_queue_release_mbufs_sse(struct iavf_rx_queue *rxq) { _iavf_rx_queue_release_mbufs_vec(rxq); } -static void __rte_cold +void __rte_cold iavf_tx_queue_release_mbufs_sse(struct iavf_tx_queue *txq) { _iavf_tx_queue_release_mbufs_vec(txq); } -static const struct iavf_rxq_ops sse_vec_rxq_ops = { - .release_mbufs = iavf_rx_queue_release_mbufs_sse, -}; - -static const struct iavf_txq_ops sse_vec_txq_ops = { - .release_mbufs = iavf_tx_queue_release_mbufs_sse, -}; - int __rte_cold iavf_txq_vec_setup(struct iavf_tx_queue *txq) { - txq->ops = &sse_vec_txq_ops; + txq->rel_mbufs_type = IAVF_REL_MBUFS_SSE_VEC; return 0; } int __rte_cold iavf_rxq_vec_setup(struct iavf_rx_queue *rxq) { - rxq->ops = &sse_vec_rxq_ops; + rxq->rel_mbufs_type = IAVF_REL_MBUFS_SSE_VEC; return iavf_rxq_vec_setup_default(rxq); }