From patchwork Tue Jun 21 06:24:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: luzhipeng X-Patchwork-Id: 113131 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1686AA0550; Tue, 21 Jun 2022 08:25:12 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B6D244069C; Tue, 21 Jun 2022 08:25:11 +0200 (CEST) Received: from smtp.cecloud.com (unknown [106.39.185.57]) by mails.dpdk.org (Postfix) with ESMTP id CCE7240151 for ; Tue, 21 Jun 2022 08:25:10 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by smtp.cecloud.com (Postfix) with ESMTP id 00321100002E0; Tue, 21 Jun 2022 14:24:59 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [111.48.58.9]) by smtp.cecloud.com (postfix) whith ESMTP id P3903393T281470723486064S1655792697877112_; Tue, 21 Jun 2022 14:24:58 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <5130ff876bb666092ab27bab9b144473> X-RL-SENDER: luzhipeng@cestc.cn X-SENDER: luzhipeng@cestc.cn X-LOGIN-NAME: luzhipeng@cestc.cn X-FST-TO: dev@dpdk.org X-RCPT-COUNT: 5 X-SENDER-IP: 111.48.58.9 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: luzhipeng To: dev@dpdk.org Cc: Jan Viktorin , Ruifeng Wang , Bruce Richardson , luzhipeng Subject: [PATCH v2] config/arm: add PHYTIUM ft2000plus Date: Tue, 21 Jun 2022 14:24:37 +0800 Message-Id: <20220621062437.525-1-luzhipeng@cestc.cn> X-Mailer: git-send-email 2.34.0.windows.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Here adds configs for PHYTIUM server. Signed-off-by: luzhipeng --- config/arm/arm64_ft2000plus_linux_gcc | 16 ++++++++++++++++ config/arm/meson.build | 26 +++++++++++++++++++++++++- 2 files changed, 41 insertions(+), 1 deletion(-) create mode 100644 config/arm/arm64_ft2000plus_linux_gcc v2: add ccache support diff --git a/config/arm/arm64_ft2000plus_linux_gcc b/config/arm/arm64_ft2000plus_linux_gcc new file mode 100644 index 0000000000..f02b492ba2 --- /dev/null +++ b/config/arm/arm64_ft2000plus_linux_gcc @@ -0,0 +1,16 @@ +[binaries] +c = [ 'ccache', 'aarch64-linux-gnu-gcc'] +cpp = [ 'ccache', 'aarch64-linux-gnu-cpp'] +ar = 'aarch64-linux-gnu-gcc-ar' +strip = 'aarch64-linux-gnu-strip' +pkgconfig = 'aarch64-linux-gnu-pkg-config' +pcap-config = '' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +platform = 'ft2000plus' diff --git a/config/arm/meson.build b/config/arm/meson.build index aa12eb76f4..48e5f6af5b 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -218,6 +218,20 @@ implementer_qualcomm = { } } +implementer_phytium = { + 'description': 'PHYTIUM', + 'flags': [ + ['RTE_MACHINE', '"armv8a"'], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 64], + ['RTE_MAX_NUMA_NODES', 8] + ], + 'part_number_config': { + '0x662': {'machine_args': ['-march=armv8-a+crc']} + } +} + ## Arm implementers (ID from MIDR in Arm Architecture Reference Manual) implementers = { 'generic': implementer_generic, @@ -225,7 +239,8 @@ implementers = { '0x43': implementer_cavium, '0x48': implementer_hisilicon, '0x50': implementer_ampere, - '0x51': implementer_qualcomm + '0x51': implementer_qualcomm, + '0x70': implementer_phytium } # SoC specific armv8 flags have the highest priority @@ -378,6 +393,13 @@ soc_thunderxt83 = { 'part_number': '0xa3' } +soc_ft2000plus = { + 'description': 'PHYTIUM ft2000plus', + 'implementer': '0x70', + 'part_number': '0x662', + 'numa': true +} + ''' Start of SoCs list generic: Generic un-optimized build for armv8 aarch64 execution mode. @@ -398,6 +420,7 @@ stingray: Broadcom Stingray thunderx2: Marvell ThunderX2 T99 thunderxt88: Marvell ThunderX T88 thunderxt83: Marvell ThunderX T83 +ft2000plus: PHYTIUM ft2000plus End of SoCs list ''' # The string above is included in the documentation, keep it in sync with the @@ -421,6 +444,7 @@ socs = { 'thunderx2': soc_thunderx2, 'thunderxt88': soc_thunderxt88, 'thunderxt83': soc_thunderxt83, + 'ft2000plus': soc_ft2000plus, } dpdk_conf.set('RTE_ARCH_ARM', 1)