From patchwork Wed Aug 17 08:10:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Kusztal X-Patchwork-Id: 115206 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 58AD1A0032; Wed, 17 Aug 2022 11:19:36 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E4E6040DDA; Wed, 17 Aug 2022 11:19:35 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 3E8794068E for ; Wed, 17 Aug 2022 11:19:34 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660727974; x=1692263974; h=from:to:cc:subject:date:message-id; bh=xtscilVmemcAelB7oWlwW8idlAiX7TZ2CWC0S8WxR8U=; b=O3YMfx/NBFRynm6GH05VlKgHp8SSbETwyl3I9B3xe7lwIgDNwSErpfYF dqkOmQo9XCkx0InDmxDYzVeZuj7tz56g6YZhhER4lIMs2vB5styN4p9LE AUwLKxsXbPkALhncmyT1C0RR93W+SXaiUa154ETGe6UFLH95e7VsCyBmk 2feaJriaThJEY3t8dfYolu7EUbHObaJNpBBR69Ie4/PmFbiZVdbwGbppR IKtPgFhqzdy2zUTkJgyVG1KVsReNGRpNyMD0jUVjFcPDpfQO4M5I7c/NB Cm4h6/QV0ti+rYdIprvMbBuo02o5wO1lxizpE8fZgcFLZas3+vx9u3pGU Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10441"; a="293723058" X-IronPort-AV: E=Sophos;i="5.93,242,1654585200"; d="scan'208";a="293723058" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Aug 2022 02:19:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,242,1654585200"; d="scan'208";a="636295208" Received: from silpixa00399302.ir.intel.com ([10.237.214.136]) by orsmga008.jf.intel.com with ESMTP; 17 Aug 2022 02:19:31 -0700 From: Arek Kusztal To: dev@dpdk.org Cc: gakhil@marvell.com, kai.ji@intel.com, Arek Kusztal Subject: [PATCH] common/qat: read slice configuration Date: Wed, 17 Aug 2022 09:10:44 +0100 Message-Id: <20220817081044.80362-1-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.13.6 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Read slice configuration of QAT capabilities. Signed-off-by: Arek Kusztal --- drivers/common/qat/qat_device.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c index db4b087d2b..d25a696c5e 100644 --- a/drivers/common/qat/qat_device.c +++ b/drivers/common/qat/qat_device.c @@ -368,6 +368,7 @@ static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, { SYM_ENQ_THRESHOLD_NAME, 0 }, { ASYM_ENQ_THRESHOLD_NAME, 0 }, { COMP_ENQ_THRESHOLD_NAME, 0 }, + { "DISABLE SLICE", 0}, { NULL, 0 }, }; @@ -390,6 +391,17 @@ static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, return -ENODEV; } + if (qat_pci_dev->qat_dev_gen == QAT_GEN3) { + uint32_t capa = 0; + const uint32_t offset = 0x4c; + + if (rte_pci_read_config(pci_dev, &capa, 4, offset) < 0) { + RTE_LOG(ERR, EAL, + "Cannot read slice configuration\n"); + } + qat_dev_cmd_param[4].val |= (0x400 & capa) | (0x800 & capa); + } + sym_ret = qat_sym_dev_create(qat_pci_dev, qat_dev_cmd_param); if (sym_ret == 0) { num_pmds_created++;