From patchwork Fri May 26 19:21:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 127562 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6DDFF42BAA; Fri, 26 May 2023 13:02:16 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4754E40DDA; Fri, 26 May 2023 13:02:16 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 0C9D540A89; Fri, 26 May 2023 13:02:14 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1685098935; x=1716634935; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=vWzpsKnjQvRmsMRv5ZyB7R/TNNz1d82F0gAjzU1kAo0=; b=XMO/nJPHuaKq8EWapoLEto8JHqN9X7JfC/wwoEaZTgE1DLHDXeElZlHG BUsyapII91XkDrOJ8e4S2NZgVHNy/n6rFkQrzXClMvemoTaWQshdEAggI D5XQHVk29qJ3pwa0W+J2VlCSFDtaszQe8UKHdo9OMwxonl3a5ILwxNvUu aTQBa+x7KNTjP2WXLmY8JXxOtGtgjrxmovsJqbu94JC2B5sHY82dovNxG ZcBUz8EjPD7mAK4BcEwmuGsqCBf4KZbUBaVSP1iI7OSG+KSgW82qWCTUz 0HGTgcgNKzQrOkz26RZnqQ1T77EzWxdeGeCHPqbb0db+99c2+ep8pVLOm w==; X-IronPort-AV: E=McAfee;i="6600,9927,10721"; a="382421417" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="382421417" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2023 04:02:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10721"; a="817498328" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="817498328" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.37]) by fmsmga002.fm.intel.com with ESMTP; 26 May 2023 04:02:12 -0700 From: Qi Zhang To: junfeng.guo@intel.com Cc: qiming.yang@intel.com, dev@dpdk.org, Qi Zhang , stable@dpdk.org Subject: [PATCH] net/ice: init dvm mode for parser Date: Fri, 26 May 2023 15:21:25 -0400 Message-Id: <20230526192125.3210774-1-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Double Vlan mode need to be configured for parser Otherwise parser result will not be consistent with hardware. Fixes: 531d2555c8a6 ("net/ice: refactor parser usage") Cc: stable@dpdk.org Signed-off-by: Qi Zhang Tested-by: Zhichao Zeng --- drivers/net/ice/ice_generic_flow.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/ice/ice_generic_flow.c b/drivers/net/ice/ice_generic_flow.c index 86a32f8cb1..ed3075d555 100644 --- a/drivers/net/ice/ice_generic_flow.c +++ b/drivers/net/ice/ice_generic_flow.c @@ -1836,6 +1836,11 @@ ice_flow_init(struct ice_adapter *ad) if (ice_parser_create(&ad->hw, &ad->psr) != ICE_SUCCESS) PMD_INIT_LOG(WARNING, "Failed to initialize DDP parser, raw packet filter will not be supported"); + if (ice_is_dvm_ena(&ad->hw)) + ice_parser_dvm_set(ad->psr, true); + else + ice_parser_dvm_set(ad->psr, false); + RTE_TAILQ_FOREACH_SAFE(engine, &engine_list, node, temp) { if (engine->init == NULL) { PMD_INIT_LOG(ERR, "Invalid engine type (%d)",