Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/129711/?format=api
{ "id": 129711, "url": "http://patchwork.dpdk.org/api/patches/129711/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230727093107.7242-3-bruce.richardson@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230727093107.7242-3-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230727093107.7242-3-bruce.richardson@intel.com", "date": "2023-07-27T09:31:07", "name": "[2/2] build: remove unnecessary AVX2 compiler flag", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "03ce39decfa281cbaaa8221e481dcbb0c6c06774", "submitter": { "id": 20, "url": "http://patchwork.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 24651, "url": "http://patchwork.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230727093107.7242-3-bruce.richardson@intel.com/mbox/", "series": [ { "id": 29021, "url": "http://patchwork.dpdk.org/api/series/29021/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29021", "date": "2023-07-27T09:31:05", "name": "simplify building x86 code with AVX2 support", "version": 1, "mbox": "http://patchwork.dpdk.org/series/29021/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/129711/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/129711/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9C31D42F5B;\n\tThu, 27 Jul 2023 11:31:33 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 19B634324C;\n\tThu, 27 Jul 2023 11:31:24 +0200 (CEST)", "from mgamail.intel.com (unknown [134.134.136.100])\n by mails.dpdk.org (Postfix) with ESMTP id 5829040693\n for <dev@dpdk.org>; Thu, 27 Jul 2023 11:31:20 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 27 Jul 2023 02:31:20 -0700", "from silpixa00401385.ir.intel.com ([10.237.214.14])\n by orsmga008.jf.intel.com with ESMTP; 27 Jul 2023 02:31:18 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1690450280; x=1721986280;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=+MbSw47jp5HzI6VnVoGLM9dwjGB3sGyanF8O9pC2vTE=;\n b=UT7GBppIMKnQpEKfTupbq4ewexQpvn6sImYRMsRZ9ma8U/znjeQDm0iU\n HgQP5UUdSUt1j2T2ZHnf/ITvbKBDrl1DaD03gsGaGPJUgFOjcAza6mEmI\n 4h1h2TCWxmo+CTas34beyqHEF7lYkjmLTwetMytwiIf0DUnKcFPGB0tj4\n N93FbXK+e5DSu7ZofiRvX4BNn3uz4vsKENrIk8gRVuAUWIhoukMj3WD6h\n T8AlqjyOw8/r+uxAi/5Dfv7l0TVWgJUWpHlYXXU7eo/w4HxEydUotz/l1\n jEHHcWtt++3UVCUmcwW1U3uoMf/2igSzqIvQNEA+U2FyMJMhAUyZL0gbV w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10783\"; a=\"434537447\"", "E=Sophos;i=\"6.01,234,1684825200\"; d=\"scan'208\";a=\"434537447\"", "E=McAfee;i=\"6600,9927,10783\"; a=\"756584463\"", "E=Sophos;i=\"6.01,234,1684825200\"; d=\"scan'208\";a=\"756584463\"" ], "X-ExtLoop1": "1", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "Bruce Richardson <bruce.richardson@intel.com>", "Subject": "[PATCH 2/2] build: remove unnecessary AVX2 compiler flag", "Date": "Thu, 27 Jul 2023 10:31:07 +0100", "Message-Id": "<20230727093107.7242-3-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20230727093107.7242-1-bruce.richardson@intel.com>", "References": "<20230727093107.7242-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Since AVX2 is always available at build time, the CC_AVX2_SUPPORT cflag\nbecame equivalent to the RTE_ARCH_X86 one. Therefore, we can just remove\nall use of the flag, replacing it will the RTE_ARCH_X86 one, and also\nsimplifying the code in a few places where we can merge with other\nX86/non-X86 blocks e.g. for providing SSE fallbacks.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n drivers/net/bnxt/bnxt_ethdev.c | 8 ++++----\n drivers/net/bnxt/bnxt_rxr.h | 2 +-\n drivers/net/bnxt/bnxt_txr.h | 2 +-\n drivers/net/bnxt/meson.build | 1 -\n drivers/net/i40e/i40e_rxtx.c | 14 ++++----------\n drivers/net/i40e/meson.build | 1 -\n drivers/net/iavf/iavf_rxtx_vec_common.h | 2 +-\n drivers/net/iavf/meson.build | 1 -\n drivers/net/ice/meson.build | 1 -\n lib/acl/meson.build | 1 -\n lib/acl/rte_acl.c | 10 +++-------\n 11 files changed, 14 insertions(+), 29 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c\nindex ee1552452a..e8c178241f 100644\n--- a/drivers/net/bnxt/bnxt_ethdev.c\n+++ b/drivers/net/bnxt/bnxt_ethdev.c\n@@ -1280,7 +1280,7 @@ bnxt_receive_function(struct rte_eth_dev *eth_dev)\n \tif (bp->ieee_1588)\n \t\tgoto use_scalar_rx;\n \n-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)\n+#if defined(RTE_ARCH_X86)\n \tif (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 &&\n \t rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1) {\n \t\tPMD_DRV_LOG(INFO,\n@@ -1332,7 +1332,7 @@ bnxt_transmit_function(struct rte_eth_dev *eth_dev)\n \t BNXT_TRUFLOW_EN(bp) || bp->ieee_1588)\n \t\tgoto use_scalar_tx;\n \n-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)\n+#if defined(RTE_ARCH_X86)\n \tif (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 &&\n \t rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1) {\n \t\tPMD_DRV_LOG(INFO,\n@@ -3019,7 +3019,7 @@ static const struct {\n #if defined(RTE_ARCH_X86)\n \t{bnxt_recv_pkts_vec,\t\t\"Vector SSE\"},\n #endif\n-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)\n+#if defined(RTE_ARCH_X86)\n \t{bnxt_recv_pkts_vec_avx2,\t\"Vector AVX2\"},\n #endif\n #if defined(RTE_ARCH_ARM64)\n@@ -3053,7 +3053,7 @@ static const struct {\n #if defined(RTE_ARCH_X86)\n \t{bnxt_xmit_pkts_vec,\t\t\"Vector SSE\"},\n #endif\n-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)\n+#if defined(RTE_ARCH_X86)\n \t{bnxt_xmit_pkts_vec_avx2,\t\"Vector AVX2\"},\n #endif\n #if defined(RTE_ARCH_ARM64)\ndiff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h\nindex 8e722b7bf0..af53bc0c25 100644\n--- a/drivers/net/bnxt/bnxt_rxr.h\n+++ b/drivers/net/bnxt/bnxt_rxr.h\n@@ -112,7 +112,7 @@ uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,\n int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);\n #endif\n \n-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)\n+#if defined(RTE_ARCH_X86)\n uint16_t bnxt_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t\t\t uint16_t nb_pkts);\n #endif\ndiff --git a/drivers/net/bnxt/bnxt_txr.h b/drivers/net/bnxt/bnxt_txr.h\nindex 8e391ee58a..e64ea2c7d1 100644\n--- a/drivers/net/bnxt/bnxt_txr.h\n+++ b/drivers/net/bnxt/bnxt_txr.h\n@@ -52,7 +52,7 @@ uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n uint16_t bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t uint16_t nb_pkts);\n #endif\n-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)\n+#if defined(RTE_ARCH_X86)\n uint16_t bnxt_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t\t uint16_t nb_pkts);\n #endif\ndiff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build\nindex c223a21002..1f9ce51f43 100644\n--- a/drivers/net/bnxt/meson.build\n+++ b/drivers/net/bnxt/meson.build\n@@ -53,7 +53,6 @@ subdir('hcapi/cfa')\n \n if arch_subdir == 'x86'\n sources += files('bnxt_rxtx_vec_sse.c')\n- cflags += ['-DCC_AVX2_SUPPORT']\n # build AVX2 code with instruction set explicitly enabled for runtime selection\n bnxt_avx2_lib = static_library('bnxt_avx2_lib',\n 'bnxt_rxtx_vec_avx2.c',\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex b4f65b58fa..63fef1a5ea 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -3216,15 +3216,9 @@ get_avx_supported(bool request_avx512)\n #endif\n \t} else {\n \t\tif (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 &&\n-\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 &&\n-\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1)\n-#ifdef CC_AVX2_SUPPORT\n+\t\t\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 &&\n+\t\t\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1)\n \t\t\treturn true;\n-#else\n-\t\tPMD_DRV_LOG(NOTICE,\n-\t\t\t\"AVX2 is not supported in build env\");\n-\t\treturn false;\n-#endif\n \t}\n \n \treturn false;\n@@ -3608,7 +3602,7 @@ i40e_set_default_pctype_table(struct rte_eth_dev *dev)\n \t}\n }\n \n-#ifndef CC_AVX2_SUPPORT\n+#ifndef RTE_ARCH_X86\n uint16_t\n i40e_recv_pkts_vec_avx2(void __rte_unused *rx_queue,\n \t\t\tstruct rte_mbuf __rte_unused **rx_pkts,\n@@ -3632,4 +3626,4 @@ i40e_xmit_pkts_vec_avx2(void __rte_unused * tx_queue,\n {\n \treturn 0;\n }\n-#endif /* ifndef CC_AVX2_SUPPORT */\n+#endif /* ifndef RTE_ARCH_X86 */\ndiff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build\nindex 46600520e1..f8827e4995 100644\n--- a/drivers/net/i40e/meson.build\n+++ b/drivers/net/i40e/meson.build\n@@ -49,7 +49,6 @@ if arch_subdir == 'x86'\n cflags += ['-fno-asynchronous-unwind-tables']\n endif\n \n- cflags += ['-DCC_AVX2_SUPPORT']\n i40e_avx2_lib = static_library('i40e_avx2_lib',\n 'i40e_rxtx_vec_avx2.c',\n dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],\ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_common.h b/drivers/net/iavf/iavf_rxtx_vec_common.h\nindex ddb13ce8c3..25f22d7267 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_common.h\n+++ b/drivers/net/iavf/iavf_rxtx_vec_common.h\n@@ -396,7 +396,7 @@ iavf_txd_enable_offload(__rte_unused struct rte_mbuf *tx_pkt,\n \t*txd_hi |= ((uint64_t)td_cmd) << IAVF_TXD_QW1_CMD_SHIFT;\n }\n \n-#ifdef CC_AVX2_SUPPORT\n+#ifdef RTE_ARCH_X86\n static __rte_always_inline void\n iavf_rxq_rearm_common(struct iavf_rx_queue *rxq, __rte_unused bool avx512)\n {\ndiff --git a/drivers/net/iavf/meson.build b/drivers/net/iavf/meson.build\nindex ff949ef92b..a6ce2725c3 100644\n--- a/drivers/net/iavf/meson.build\n+++ b/drivers/net/iavf/meson.build\n@@ -29,7 +29,6 @@ if arch_subdir == 'x86'\n cflags += ['-fno-asynchronous-unwind-tables']\n endif\n \n- cflags += ['-DCC_AVX2_SUPPORT']\n iavf_avx2_lib = static_library('iavf_avx2_lib',\n 'iavf_rxtx_vec_avx2.c',\n dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],\ndiff --git a/drivers/net/ice/meson.build b/drivers/net/ice/meson.build\nindex 98288f6ac0..a957fc5d3a 100644\n--- a/drivers/net/ice/meson.build\n+++ b/drivers/net/ice/meson.build\n@@ -28,7 +28,6 @@ if arch_subdir == 'x86'\n cflags += ['-fno-asynchronous-unwind-tables']\n endif\n \n- cflags += ['-DCC_AVX2_SUPPORT']\n ice_avx2_lib = static_library('ice_avx2_lib',\n 'ice_rxtx_vec_avx2.c',\n dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],\ndiff --git a/lib/acl/meson.build b/lib/acl/meson.build\nindex 87f19757a8..9cba08321a 100644\n--- a/lib/acl/meson.build\n+++ b/lib/acl/meson.build\n@@ -14,7 +14,6 @@ headers = files('rte_acl.h', 'rte_acl_osdep.h')\n if dpdk_conf.has('RTE_ARCH_X86')\n sources += files('acl_run_sse.c')\n \n- cflags += '-DCC_AVX2_SUPPORT'\n avx2_tmplib = static_library('avx2_tmp',\n 'acl_run_avx2.c',\n dependencies: static_rte_eal,\ndiff --git a/lib/acl/rte_acl.c b/lib/acl/rte_acl.c\nindex a61c3ba188..4182006d1d 100644\n--- a/lib/acl/rte_acl.c\n+++ b/lib/acl/rte_acl.c\n@@ -42,10 +42,9 @@ rte_acl_classify_avx512x32(__rte_unused const struct rte_acl_ctx *ctx,\n }\n #endif\n \n-#ifndef CC_AVX2_SUPPORT\n+#ifndef RTE_ARCH_X86\n /*\n- * If the compiler doesn't support AVX2 instructions,\n- * then the dummy one would be used instead for AVX2 classify method.\n+ * If ISA doesn't have AVX2 or SSE, provide dummy fallbacks\n */\n int\n rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,\n@@ -56,9 +55,6 @@ rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,\n {\n \treturn -ENOTSUP;\n }\n-#endif\n-\n-#ifndef RTE_ARCH_X86\n int\n rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,\n \t__rte_unused const uint8_t **data,\n@@ -182,7 +178,7 @@ acl_check_alg_x86(enum rte_acl_classify_alg alg)\n \t}\n \n \tif (alg == RTE_ACL_CLASSIFY_AVX2) {\n-#ifdef CC_AVX2_SUPPORT\n+#ifdef RTE_ARCH_X86\n \t\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) &&\n \t\t\t\trte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)\n \t\t\treturn 0;\n", "prefixes": [ "2/2" ] }