Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/130751/?format=api
{ "id": 130751, "url": "http://patchwork.dpdk.org/api/patches/130751/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230825101344.1828774-5-simei.su@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230825101344.1828774-5-simei.su@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230825101344.1828774-5-simei.su@intel.com", "date": "2023-08-25T10:13:31", "name": "[v2,04/17] common/idpf/base: remove mailbox registers", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "25537d50079677fab8a3893deaabe70f6e22d060", "submitter": { "id": 1298, "url": "http://patchwork.dpdk.org/api/people/1298/?format=api", "name": "Simei Su", "email": "simei.su@intel.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230825101344.1828774-5-simei.su@intel.com/mbox/", "series": [ { "id": 29341, "url": "http://patchwork.dpdk.org/api/series/29341/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29341", "date": "2023-08-25T10:13:27", "name": "update idpf base code", "version": 2, "mbox": "http://patchwork.dpdk.org/series/29341/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/130751/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/130751/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8DB6D430FF;\n\tFri, 25 Aug 2023 12:14:01 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id F1F0E43254;\n\tFri, 25 Aug 2023 12:13:52 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [134.134.136.100])\n by mails.dpdk.org (Postfix) with ESMTP id 3C025400D5\n for <dev@dpdk.org>; Fri, 25 Aug 2023 12:13:45 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 25 Aug 2023 03:13:40 -0700", "from dpdk-simei-icelake.sh.intel.com ([10.67.110.167])\n by orsmga001.jf.intel.com with ESMTP; 25 Aug 2023 03:13:38 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1692958425; x=1724494425;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=0XmT7RZkHF6YwsFjzbuTq42EJOdCqeCmASBS87xT2lk=;\n b=YjP3emgWqLe7ueqBViBmvwLKH5tF/46JKKIRRJmERYi/XraLXJd3eNix\n 08D7dQbwkfxEUpI9e4diBO8WbPWr5IDAbgTUZInD0awdE7P9LoLED061v\n n5SOjb/B3bAzCKhEyDnnFzuNe/yPffpkayVMof6QnXXhroV8LXBAK9IV3\n eVAau5tuXi53zNWNU+evxBpBUQidfwfyGWTJunphLGuBPc+aVXZRgq6Gp\n /JtDGhFh4Of6IL2KKI5gDHXeEKu2JpZ7CZagWxYJNEbexepKk3lzBpSX9\n aVkg0CV3+RNSDzspCLQcjXVkMudetgTYFl9+g8tQkEnLwgPW4t0TDc51p w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10812\"; a=\"441027926\"", "E=Sophos;i=\"6.02,195,1688454000\"; d=\"scan'208\";a=\"441027926\"", "E=McAfee;i=\"6600,9927,10812\"; a=\"772439483\"", "E=Sophos;i=\"6.02,195,1688454000\"; d=\"scan'208\";a=\"772439483\"" ], "X-ExtLoop1": "1", "From": "Simei Su <simei.su@intel.com>", "To": "jingjing.wu@intel.com,\n\tbeilei.xing@intel.com,\n\tqi.z.zhang@intel.com", "Cc": "dev@dpdk.org, mingxia.liu@intel.com, wenjing.qiao@intel.com,\n Simei Su <simei.su@intel.com>, Madhu Chittim <madhu.chittim@intel.com>", "Subject": "[PATCH v2 04/17] common/idpf/base: remove mailbox registers", "Date": "Fri, 25 Aug 2023 18:13:31 +0800", "Message-Id": "<20230825101344.1828774-5-simei.su@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230825101344.1828774-1-simei.su@intel.com>", "References": "<20230809013308.1449103-1-wenjing.qiao@intel.com>\n <20230825101344.1828774-1-simei.su@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Removing mailbox register offsets as the mapping to device register\noffsets are different between CVL and MEV (they are swapped out)\nindividual drivers will define the offsets based on how registers\nare hardware addressed. However the it will begin with VDEV_MBX_START\noffset.\n\nSigned-off-by: Madhu Chittim <madhu.chittim@intel.com>\nSigned-off-by: Simei Su <simei.su@intel.com>\n---\n .mailmap | 1 +\n drivers/common/idpf/base/siov_regs.h | 13 ++-----------\n 2 files changed, 3 insertions(+), 11 deletions(-)", "diff": "diff --git a/.mailmap b/.mailmap\nindex af452d54c6..f23f8fecfa 100644\n--- a/.mailmap\n+++ b/.mailmap\n@@ -1641,3 +1641,4 @@ Zyta Szpak <zyta@marvell.com> <zr@semihalf.com> <zyta.szpak@semihalf.com>\n Jayaprakash Shanmugam <jayaprakash.shanmugam@intel.com>\n Zhenning Xiao <zhenning.xiao@intel.com>\n Josh Hay <joshua.a.hay@intel.com>\n+Madhu Chittim <madhu.chittim@intel.com>\ndiff --git a/drivers/common/idpf/base/siov_regs.h b/drivers/common/idpf/base/siov_regs.h\nindex fad329601a..7e1ae2e300 100644\n--- a/drivers/common/idpf/base/siov_regs.h\n+++ b/drivers/common/idpf/base/siov_regs.h\n@@ -4,16 +4,6 @@\n #ifndef _SIOV_REGS_H_\n #define _SIOV_REGS_H_\n #define VDEV_MBX_START\t\t\t0x20000 /* Begin at 128KB */\n-#define VDEV_MBX_ATQBAL\t\t\t(VDEV_MBX_START + 0x0000)\n-#define VDEV_MBX_ATQBAH\t\t\t(VDEV_MBX_START + 0x0004)\n-#define VDEV_MBX_ATQLEN\t\t\t(VDEV_MBX_START + 0x0008)\n-#define VDEV_MBX_ATQH\t\t\t(VDEV_MBX_START + 0x000C)\n-#define VDEV_MBX_ATQT\t\t\t(VDEV_MBX_START + 0x0010)\n-#define VDEV_MBX_ARQBAL\t\t\t(VDEV_MBX_START + 0x0014)\n-#define VDEV_MBX_ARQBAH\t\t\t(VDEV_MBX_START + 0x0018)\n-#define VDEV_MBX_ARQLEN\t\t\t(VDEV_MBX_START + 0x001C)\n-#define VDEV_MBX_ARQH\t\t\t(VDEV_MBX_START + 0x0020)\n-#define VDEV_MBX_ARQT\t\t\t(VDEV_MBX_START + 0x0024)\n #define VDEV_GET_RSTAT\t\t\t0x21000 /* 132KB for RSTAT */\n \n /* Begin at offset after 1MB (after 256 4k pages) */\n@@ -43,5 +33,6 @@\n #define VDEV_INT_ITR_1(_i)\t\t(VDEV_INT_DYN_START + ((_i) * 0x1000) + 0x08)\n #define VDEV_INT_ITR_2(_i)\t\t(VDEV_INT_DYN_START + ((_i) * 0x1000) + 0x0C)\n \n-/* Next offset to begin at 42MB (0x2A00000) */\n+#define SIOV_REG_BAR_SIZE 0x2A00000\n+/* Next offset to begin at 42MB + 4K (0x2A00000 + 0x1000) */\n #endif /* _SIOV_REGS_H_ */\n", "prefixes": [ "v2", "04/17" ] }