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GET /api/patches/131261/?format=api
{ "id": 131261, "url": "http://patchwork.dpdk.org/api/patches/131261/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230908092100.38587-2-jiaweiw@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230908092100.38587-2-jiaweiw@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230908092100.38587-2-jiaweiw@nvidia.com", "date": "2023-09-08T09:20:58", "name": "[1/3] net/mlx5: extend send to kernel action support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "6454cede9bbb26535d393d584d5114907ea0e717", "submitter": { "id": 1939, "url": "http://patchwork.dpdk.org/api/people/1939/?format=api", "name": "Jiawei Wang", "email": "jiaweiw@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230908092100.38587-2-jiaweiw@nvidia.com/mbox/", "series": [ { "id": 29458, "url": "http://patchwork.dpdk.org/api/series/29458/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29458", "date": "2023-09-08T09:20:57", "name": "net/mlx5: extend send to kernel action support", "version": 1, "mbox": "http://patchwork.dpdk.org/series/29458/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/131261/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/131261/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 14C0A42546;\n\tFri, 8 Sep 2023 11:21:38 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0B5EE402DE;\n\tFri, 8 Sep 2023 11:21:38 +0200 (CEST)", "from NAM12-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam12on2041.outbound.protection.outlook.com [40.107.243.41])\n by mails.dpdk.org (Postfix) with ESMTP id BC02840042\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Jiawei Wang <jiaweiw@nvidia.com>", "To": "<suanmingm@nvidia.com>, <orika@nvidia.com>, <thomas@monjalon.net>", "CC": "<dev@dpdk.org>, <rasland@nvidia.com>", "Subject": "[PATCH 1/3] net/mlx5: extend send to kernel action support", "Date": "Fri, 8 Sep 2023 12:20:58 +0300", "Message-ID": "<20230908092100.38587-2-jiaweiw@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20230908092100.38587-1-jiaweiw@nvidia.com>", "References": "<20230908092100.38587-1-jiaweiw@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail201.nvidia.com (10.129.68.8) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000E9CF:EE_|CY8PR12MB7193:EE_", "X-MS-Office365-Filtering-Correlation-Id": "6d454f56-7f82-4ee7-8ce4-08dbb04cfeaa", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n EKeCphTXO0zvNgJ2Mc/vRNtZ4P/FIPh7ZeY6fx4eT/1byGlFErP14UcJTuApyaLtt1ahizmm3lebV+Tu97d/keqGgeyH9Orp1IAbiWTC4cZmYZJzD9JbWzZtMdeAgS+y4H3OiO4ipNMZNOQKWXptYNf8gZEfCYldtx6EpU0znZ//69U6DS/Xvq3JeZb3Fg7Y4XCtoIfRaEWA95USkbw1O/ZubII6lEdQOcf9FusUjo6ftwLdjk+gNAxUkJO5FW603gHwSyLzJrf6yXp3O4skfTKQXsNBNe7g+jhdmX4p4KiZPIKX8X/m+P1tMa9ICIYc87I6xC8qL1/BC6EsgOunUWpZuB2BTuKVF2jQZDbZz31aTTQAXqV1rYh6mozLJ6q4Nd4rYARc2OlDjY39aeCosB04YlRLdWuk3TcUBFrz9X5ZMm0s80adWfP/+SM5ok/x5Nvz3dRiFu2Z2XMG9nvFNG0aAS0FzSrClloKAW6K2Pd2drpozxlG6/5jjZ1eIjnEPEolo4cb0MNf5N1HMdGKl25U2hXNhsIYJuQO1kOOVQGnoWYaEX1Ea8xDjfh1WQ0yLWk9p/cz1NLm51VW7jlI18hq9BCZYQh9PhfRIcO617dW21gKnrljb2SCHrImA0p2KgtGWh1doT+hcS1/luJ7tT2VvTwrvYdAN1lU11wgOz2o9fVEarDBm8k08woi+1ukOklxjaIIjEVY7ImRJmDOMqrbPAkqAGvvafKIhwqLAJI=", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(136003)(376002)(346002)(39860400002)(396003)(82310400011)(186009)(1800799009)(451199024)(36840700001)(46966006)(40470700004)(70206006)(5660300002)(7696005)(4326008)(8676002)(8936002)(70586007)(316002)(54906003)(41300700001)(478600001)(2906002)(6666004)(336012)(16526019)(26005)(1076003)(107886003)(426003)(6286002)(2616005)(47076005)(36860700001)(83380400001)(55016003)(7636003)(110136005)(82740400003)(356005)(40460700003)(86362001)(40480700001)(36756003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "08 Sep 2023 09:21:33.8244 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 6d454f56-7f82-4ee7-8ce4-08dbb04cfeaa", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000E9CF.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY8PR12MB7193", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The send to kernel action was supported in NIC and FDB tables,\nCurrently, the send to kernel action is created in NIC RX only.\n\nWith some TC rules (example: roce packets, redirects into rep ports)\nand DPDK RTE rules for the rest of the traffic. Then it needs the\nspecific rule to re-route the packets into the kernel through the FDB\ntable.\n\nThis patch adds the FDB and NIC-TX tables support for sending to the kernel\naction.\n\nSigned-off-by: Jiawei Wang <jiaweiw@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_os.c | 25 +++++++++++++++----------\n drivers/net/mlx5/mlx5.h | 4 +++-\n drivers/net/mlx5/mlx5_flow.h | 1 +\n drivers/net/mlx5/mlx5_flow_dv.c | 17 +++++++++++------\n 4 files changed, 30 insertions(+), 17 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex d8f1adfe3d..38572eb652 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -675,6 +675,9 @@ void\n mlx5_os_free_shared_dr(struct mlx5_priv *priv)\n {\n \tstruct mlx5_dev_ctx_shared *sh = priv->sh;\n+#ifdef HAVE_MLX5DV_DR\n+\tint i;\n+#endif\n \n \tMLX5_ASSERT(sh && sh->refcnt);\n \tif (sh->refcnt > 1)\n@@ -703,18 +706,20 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv)\n \t\tmlx5_glue->destroy_flow_action(sh->pop_vlan_action);\n \t\tsh->pop_vlan_action = NULL;\n \t}\n-\tif (sh->send_to_kernel_action.action) {\n-\t\tvoid *action = sh->send_to_kernel_action.action;\n+\tfor (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) {\n+\t\tif (sh->send_to_kernel_action[i].action) {\n+\t\t\tvoid *action = sh->send_to_kernel_action[i].action;\n \n-\t\tmlx5_glue->destroy_flow_action(action);\n-\t\tsh->send_to_kernel_action.action = NULL;\n-\t}\n-\tif (sh->send_to_kernel_action.tbl) {\n-\t\tstruct mlx5_flow_tbl_resource *tbl =\n-\t\t\t\tsh->send_to_kernel_action.tbl;\n+\t\t\tmlx5_glue->destroy_flow_action(action);\n+\t\t\tsh->send_to_kernel_action[i].action = NULL;\n+\t\t}\n+\t\tif (sh->send_to_kernel_action[i].tbl) {\n+\t\t\tstruct mlx5_flow_tbl_resource *tbl =\n+\t\t\t\t\tsh->send_to_kernel_action[i].tbl;\n \n-\t\tflow_dv_tbl_resource_release(sh, tbl);\n-\t\tsh->send_to_kernel_action.tbl = NULL;\n+\t\t\tflow_dv_tbl_resource_release(sh, tbl);\n+\t\t\tsh->send_to_kernel_action[i].tbl = NULL;\n+\t\t}\n \t}\n #endif /* HAVE_MLX5DV_DR */\n \tif (sh->default_miss_action)\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 3785103308..6960a07d40 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1432,7 +1432,9 @@ struct mlx5_dev_ctx_shared {\n \t/* Direct Rules tables for FDB, NIC TX+RX */\n \tvoid *dr_drop_action; /* Pointer to DR drop action, any domain. */\n \tvoid *pop_vlan_action; /* Pointer to DR pop VLAN action. */\n-\tstruct mlx5_send_to_kernel_action send_to_kernel_action;\n+#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)\n+\tstruct mlx5_send_to_kernel_action send_to_kernel_action[MLX5DR_TABLE_TYPE_MAX];\n+#endif\n \tstruct mlx5_hlist *encaps_decaps; /* Encap/decap action hash list. */\n \tstruct mlx5_hlist *modify_cmds;\n \tstruct mlx5_hlist *tag_table;\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 3a97975d69..6beac3902c 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -331,6 +331,7 @@ enum mlx5_feature_name {\n \n #define MLX5_FLOW_FATE_ESWITCH_ACTIONS \\\n \t(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \\\n+\t MLX5_FLOW_ACTION_SEND_TO_KERNEL | \\\n \t MLX5_FLOW_ACTION_JUMP | MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)\n \n #define MLX5_FLOW_MODIFY_HDR_ACTIONS (MLX5_FLOW_ACTION_SET_IPV4_SRC | \\\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex a8dd9920e6..fe0814a2eb 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -12724,17 +12724,22 @@ flow_dv_translate_action_sample(struct rte_eth_dev *dev,\n \n static void *\n flow_dv_translate_action_send_to_kernel(struct rte_eth_dev *dev,\n+\t\t\t\t\tconst struct rte_flow_attr *attr,\n \t\t\t\t\tstruct rte_flow_error *error)\n {\n \tstruct mlx5_flow_tbl_resource *tbl;\n \tstruct mlx5_dev_ctx_shared *sh;\n \tuint32_t priority;\n \tvoid *action;\n+\tint ft_type;\n \tint ret;\n \n \tsh = MLX5_SH(dev);\n-\tif (sh->send_to_kernel_action.action)\n-\t\treturn sh->send_to_kernel_action.action;\n+\tft_type = (attr->ingress) ? MLX5DR_TABLE_TYPE_NIC_RX :\n+\t\t ((attr->transfer) ? MLX5DR_TABLE_TYPE_FDB :\n+\t\t MLX5DR_TABLE_TYPE_NIC_TX);\n+\tif (sh->send_to_kernel_action[ft_type].action)\n+\t\treturn sh->send_to_kernel_action[ft_type].action;\n \tpriority = mlx5_get_send_to_kernel_priority(dev);\n \tif (priority == (uint32_t)-1) {\n \t\trte_flow_error_set(error, ENOTSUP,\n@@ -12742,7 +12747,7 @@ flow_dv_translate_action_send_to_kernel(struct rte_eth_dev *dev,\n \t\t\t\t \"required priority is not available\");\n \t\treturn NULL;\n \t}\n-\ttbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL, 0, 0, 0,\n+\ttbl = flow_dv_tbl_resource_get(dev, 0, attr->egress, attr->transfer, false, NULL, 0, 0, 0,\n \t\t\t\t error);\n \tif (!tbl) {\n \t\trte_flow_error_set(error, ENODATA,\n@@ -12759,8 +12764,8 @@ flow_dv_translate_action_send_to_kernel(struct rte_eth_dev *dev,\n \t\tgoto err;\n \t}\n \tMLX5_ASSERT(action);\n-\tsh->send_to_kernel_action.action = action;\n-\tsh->send_to_kernel_action.tbl = tbl;\n+\tsh->send_to_kernel_action[ft_type].action = action;\n+\tsh->send_to_kernel_action[ft_type].tbl = tbl;\n \treturn action;\n err:\n \tflow_dv_tbl_resource_release(sh, tbl);\n@@ -14511,7 +14516,7 @@ flow_dv_translate(struct rte_eth_dev *dev,\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_SEND_TO_KERNEL:\n \t\t\tdev_flow->dv.actions[actions_n] =\n-\t\t\t\tflow_dv_translate_action_send_to_kernel(dev,\n+\t\t\t\tflow_dv_translate_action_send_to_kernel(dev, attr,\n \t\t\t\t\t\t\terror);\n \t\t\tif (!dev_flow->dv.actions[actions_n])\n \t\t\t\treturn -rte_errno;\n", "prefixes": [ "1/3" ] }