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GET /api/patches/136216/?format=api
{ "id": 136216, "url": "http://patchwork.dpdk.org/api/patches/136216/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20240130064913.1916709-1-gavinl@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240130064913.1916709-1-gavinl@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240130064913.1916709-1-gavinl@nvidia.com", "date": "2024-01-30T06:49:13", "name": "[V1] net/mlx5: store IPv6 TC detection result in physical device", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "fe7ea8a641fe10034c57cd44e5520058b6bf4ad3", "submitter": { "id": 3217, "url": "http://patchwork.dpdk.org/api/people/3217/?format=api", "name": "Gavin Li", "email": "gavinl@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20240130064913.1916709-1-gavinl@nvidia.com/mbox/", "series": [ { "id": 30938, "url": "http://patchwork.dpdk.org/api/series/30938/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=30938", "date": "2024-01-30T06:49:13", "name": "[V1] net/mlx5: store IPv6 TC detection result in physical device", "version": 1, "mbox": "http://patchwork.dpdk.org/series/30938/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/136216/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/136216/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 32A1943A06;\n\tTue, 30 Jan 2024 07:49:51 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B4A6340395;\n\tTue, 30 Jan 2024 07:49:50 +0100 (CET)", "from NAM10-BN7-obe.outbound.protection.outlook.com\n (mail-bn7nam10on2072.outbound.protection.outlook.com [40.107.92.72])\n by mails.dpdk.org (Postfix) with ESMTP id AB89A4029A\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Gavin Li <gavinl@nvidia.com>", "To": "<dsosnowski@nvidia.com>, <viacheslavo@nvidia.com>, <orika@nvidia.com>,\n <suanmingm@nvidia.com>, <matan@nvidia.com>", "CC": "<dev@dpdk.org>, <rasland@nvidia.com>, <jiaweiw@nvidia.com>", "Subject": "[PATCH V1] net/mlx5: store IPv6 TC detection result in physical\n device", "Date": "Tue, 30 Jan 2024 08:49:13 +0200", "Message-ID": "<20240130064913.1916709-1-gavinl@nvidia.com>", "X-Mailer": "git-send-email 2.34.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CO1PEPF000044F3:EE_|CH0PR12MB5026:EE_", "X-MS-Office365-Filtering-Correlation-Id": "9eb50afb-0a39-4103-8b55-08dc215fa4e8", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n lYNa/toFT6X5X9JgMl4iAWAO/2TyyjMf5+SgiGPjJEZ30B2aJsdCh4WCJ9pdrXkS5VtMT0kovjwt8aIOQpvY20zdgha2UCPToW0xcCALqPiDeMO8gjN+f0neLCRoz/wWVncByYUKUxCwfhs0uM3zGtV3iPXU72kaSxbLj//tje+Ag65ucVUY+Y7PgXNKidjcLyZ2QPNw1ApR0UqnG/wxwcliHTlr0H/U86MTTikdZgHiT69+V9TXgHqqtAsPivMJW7ckp+ty3gYIqyawtzBKTqPzCxfkS9W3DYm+UMrHsu5jF3UXT9LUAPkniyC6TWyp0RhiorC2PMOz69Cr3ItEW/F0thX4WUsJUF4YZQIn9NgsNt3LQQaG3uX1vlHxOTBd0lYZ/rh8kqLF4uidiA60pkRgrvL3vkPaRs6AZ4tBuNM2MPpFYygM+ULTRqFUjAvPnDeKKJC5mxXXwhzk09mHNGjHGF+dX56ONqF18qxdIVNAetylU4OWl2T9GqtcytY6hrNUjbyaVPitNWFjAu9mkXq7rerKoKJpYbWt39zDPJrkkkwixY6q4lZC03Yrpn5NZoSkL4QW309eeZsLJ0g7VfYDQ3Elum60E5xxEt2H9gxE1jdeBQj0YutP/6T9UGFNWgJlMwRohpe8lrc/HGVqH1G5/DeEPFL9WmCDfPTWSMeR6QUpTaX7h5tD0ITmfhi6tUpfjtBgvZ485PaUmkdIYmeOA+deTbgl1GV1ZrTpDwkbRhK2FttGQpmLQcJz5uIg", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(346002)(376002)(136003)(396003)(39860400002)(230922051799003)(451199024)(1800799012)(82310400011)(64100799003)(186009)(46966006)(40470700004)(36840700001)(36756003)(2906002)(41300700001)(2616005)(1076003)(16526019)(83380400001)(6286002)(26005)(55016003)(426003)(336012)(316002)(6636002)(54906003)(110136005)(70206006)(70586007)(6666004)(40480700001)(40460700003)(478600001)(7696005)(107886003)(36860700001)(82740400003)(7636003)(356005)(47076005)(8936002)(4326008)(8676002)(86362001)(5660300002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Jan 2024 06:49:45.0518 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 9eb50afb-0a39-4103-8b55-08dc215fa4e8", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1PEPF000044F3.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH0PR12MB5026", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Previously, discovering of IPv6 traffic class would happen on each device\nnot sharing context with others. However, It's not necessary to repeat it\non devices of the same physical device. A flow will be created and\ndestroyed in the detection, which may trigger cache allocation and take\nmore memory in scale cases.\n\nTo solve the problem, store the discovering of IPv6 traffic class result\nin physical device, and do it only once per physical device.\n\nFixes: 569b8340a012 (\"net/mlx5: discover IPv6 traffic class support in RDMA core\")\nSigned-off-by: Gavin Li <gavinl@nvidia.com>\nAcked-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_os.c | 12 +++++++-----\n drivers/net/mlx5/mlx5.h | 13 ++++++++++++-\n drivers/net/mlx5/mlx5_flow_dv.c | 2 +-\n 3 files changed, 20 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex e47d0d0238..dd140e9934 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -1602,11 +1602,13 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\tgoto error;\n \t}\n \trte_rwlock_init(&priv->ind_tbls_lock);\n-\tif (!priv->sh->cdev->config.hca_attr.modify_outer_ipv6_traffic_class ||\n-\t (sh->config.dv_flow_en == 1 &&\n-\t !priv->sh->ipv6_tc_fallback &&\n-\t mlx5_flow_discover_ipv6_tc_support(eth_dev)))\n-\t\tpriv->sh->ipv6_tc_fallback = 1;\n+\tif (sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_UNKNOWN) {\n+\t\tif (!sh->cdev->config.hca_attr.modify_outer_ipv6_traffic_class ||\n+\t\t (sh->config.dv_flow_en == 1 && mlx5_flow_discover_ipv6_tc_support(eth_dev)))\n+\t\t\tsh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_FALLBACK;\n+\t\telse\n+\t\t\tsh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_OK;\n+\t}\n \tif (priv->sh->config.dv_flow_en == 2) {\n #ifdef HAVE_MLX5_HWS_SUPPORT\n \t\tif (priv->sh->config.dv_esw_en) {\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 683029023e..ce9aa64a1d 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1421,6 +1421,17 @@ struct mlx5_dev_registers {\n \n struct mlx5_geneve_tlv_options;\n \n+enum mlx5_ipv6_tc_support {\n+\tMLX5_IPV6_TC_UNKNOWN = 0,\n+\tMLX5_IPV6_TC_FALLBACK,\n+\tMLX5_IPV6_TC_OK,\n+};\n+\n+struct mlx5_common_nic_config {\n+\tenum mlx5_ipv6_tc_support ipv6_tc_fallback;\n+\t/* Whether ipv6 traffic class should use old value. */\n+};\n+\n /**\n * Physical device structure.\n * This device is created once per NIC to manage recourses shared by all ports\n@@ -1431,6 +1442,7 @@ struct mlx5_physical_device {\n \tstruct mlx5_dev_ctx_shared *sh; /* Created on sherd context. */\n \tuint64_t guid; /* System image guid, the uniq ID of physical device. */\n \tstruct mlx5_geneve_tlv_options *tlv_options;\n+\tstruct mlx5_common_nic_config config;\n \tuint32_t refcnt;\n };\n \n@@ -1459,7 +1471,6 @@ struct mlx5_dev_ctx_shared {\n \tuint32_t lag_rx_port_affinity_en:1;\n \t/* lag_rx_port_affinity is supported. */\n \tuint32_t hws_max_log_bulk_sz:5;\n-\tuint32_t ipv6_tc_fallback:1;\n \t/* Log of minimal HWS counters created hard coded. */\n \tuint32_t hws_max_nb_counters; /* Maximal number for HWS counters. */\n \tuint32_t max_port; /* Maximal IB device port index. */\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 6998be107f..1d2fdd3391 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1608,7 +1608,7 @@ mlx5_modify_flex_item(const struct rte_eth_dev *dev,\n static inline bool\n mlx5_dv_modify_ipv6_traffic_class_supported(struct mlx5_priv *priv)\n {\n-\treturn !priv->sh->ipv6_tc_fallback;\n+\treturn priv->sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_OK;\n }\n \n void\n", "prefixes": [ "V1" ] }