[02/13] common/mlx5: fix error in mlx5 prm structs

Message ID 20240314114220.203241-2-igozlan@nvidia.com (mailing list archive)
State Superseded
Delegated to: Raslan Darawsheh
Headers
Series [01/13] net/mlx5/hws: move warn into debug level when needed |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Itamar Gozlan March 14, 2024, 11:42 a.m. UTC
  From: Yevgeny Kliteynik <kliteyn@nvidia.com>

Fix wrong reserved size and add helpful comment

Fixes: 365cdf5f8ce ("net/mlx5/hws: add command layer")

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/common/mlx5/mlx5_prm.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
  

Patch

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index c671c75bfd..c6846cdb7e 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -2360,8 +2360,8 @@  struct mlx5_ifc_cmd_hca_cap_2_bits {
 	u8 reserved_at_d0[0x3];
 	u8 log_conn_track_max_alloc[0x5];
 	u8 reserved_at_d8[0x3];
-	u8 log_max_conn_track_offload[0x5];
-	u8 cross_vhca_object_to_object_supported[0x20]; /* End of DW7. */
+	u8 log_max_conn_track_offload[0x5]; /* End of DW7. */
+	u8 cross_vhca_object_to_object_supported[0x20];
 	u8 allowed_object_for_other_vhca_access_high[0x20];
 	u8 allowed_object_for_other_vhca_access[0x20];
 	u8 reserved_at_140[0x20];
@@ -3655,7 +3655,7 @@  struct mlx5_ifc_stc_ste_param_vport_bits {
 	u8 eswitch_owner_vhca_id[0x10];
 	u8 vport_number[0x10];
 	u8 eswitch_owner_vhca_id_valid[0x1];
-	u8 reserved_at_21[0x59];
+	u8 reserved_at_21[0x5f];
 };
 
 union mlx5_ifc_stc_param_bits {