diff mbox series

[v4,36/39] fib: use C11 alignas

Message ID 1707928564-28796-37-git-send-email-roretzla@linux.microsoft.com (mailing list archive)
State Superseded, archived
Delegated to: David Marchand
Headers
Series use C11 alignas and normalize type alignment |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tyler Retzlaff Feb. 14, 2024, 4:36 p.m. UTC 
* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/fib/dir24_8.h | 4 +++-
 lib/fib/trie.h    | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/lib/fib/dir24_8.h b/lib/fib/dir24_8.h
index b0d1a40..6d350f7 100644
--- a/lib/fib/dir24_8.h
+++ b/lib/fib/dir24_8.h
@@ -6,6 +6,8 @@ 
 #ifndef _DIR24_8_H_
 #define _DIR24_8_H_
 
+#include <stdalign.h>
+
 #include <rte_prefetch.h>
 #include <rte_branch_prediction.h>
 
@@ -32,7 +34,7 @@  struct dir24_8_tbl {
 	uint64_t	*tbl8;		/**< tbl8 table. */
 	uint64_t	*tbl8_idxes;	/**< bitmap containing free tbl8 idxes*/
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline void *
diff --git a/lib/fib/trie.h b/lib/fib/trie.h
index 3cf161a..36ce1fd 100644
--- a/lib/fib/trie.h
+++ b/lib/fib/trie.h
@@ -6,6 +6,8 @@ 
 #ifndef _TRIE_H_
 #define _TRIE_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE IPv6 Longest Prefix Match (LPM)
@@ -36,7 +38,7 @@  struct rte_trie_tbl {
 	uint32_t	*tbl8_pool;	/**< bitmap containing free tbl8 idxes*/
 	uint32_t	tbl8_pool_pos;
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline uint32_t