[v4,10/18] net/enic: stop using zero sized marker fields

Message ID 1707978080-28859-11-git-send-email-roretzla@linux.microsoft.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series stop using zero sized marker fields |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tyler Retzlaff Feb. 15, 2024, 6:21 a.m. UTC
  Update to reference newly named anonymous union markers supported by
standard C and stop referencing zero sized compiler extension markers.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/enic/enic.h               |  2 +-
 drivers/net/enic/enic_main.c          |  4 ++--
 drivers/net/enic/enic_rxtx_vec_avx2.c | 22 +++++++++++-----------
 3 files changed, 14 insertions(+), 14 deletions(-)
  

Patch

diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h
index 7877870..f2064ad 100644
--- a/drivers/net/enic/enic.h
+++ b/drivers/net/enic/enic.h
@@ -92,7 +92,7 @@  struct enic {
 	struct vnic_dev *vdev;
 
 	/*
-	 * mbuf_initializer contains 64 bits of mbuf rearm_data, used by
+	 * mbuf_initializer contains 64 bits of mbuf mbuf_rearm_data, used by
 	 * the avx2 handler at this time.
 	 */
 	uint64_t mbuf_initializer;
diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c
index a6aaa76..923f92f 100644
--- a/drivers/net/enic/enic_main.c
+++ b/drivers/net/enic/enic_main.c
@@ -584,7 +584,7 @@  int enic_enable(struct enic *enic)
 
 		/*
 		 * mbuf_initializer contains const-after-init fields of
-		 * receive mbufs (i.e. 64 bits of fields from rearm_data).
+		 * receive mbufs (i.e. 64 bits of fields from mbuf_rearm_data).
 		 * It is currently used by the vectorized handler.
 		 */
 		mb_def.nb_segs = 1;
@@ -592,7 +592,7 @@  int enic_enable(struct enic *enic)
 		mb_def.port = enic->port_id;
 		rte_mbuf_refcnt_set(&mb_def, 1);
 		rte_compiler_barrier();
-		p = (uintptr_t)&mb_def.rearm_data;
+		p = (uintptr_t)&mb_def.mbuf_rearm_data;
 		enic->mbuf_initializer = *(uint64_t *)p;
 	}
 
diff --git a/drivers/net/enic/enic_rxtx_vec_avx2.c b/drivers/net/enic/enic_rxtx_vec_avx2.c
index 600efff..bd495d7 100644
--- a/drivers/net/enic/enic_rxtx_vec_avx2.c
+++ b/drivers/net/enic/enic_rxtx_vec_avx2.c
@@ -19,7 +19,7 @@ 
 {
 	bool tnl;
 
-	*(uint64_t *)&mb->rearm_data = enic->mbuf_initializer;
+	*(uint64_t *)&mb->mbuf_rearm_data = enic->mbuf_initializer;
 	mb->data_len = cqd->bytes_written_flags &
 		CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
 	mb->pkt_len = mb->data_len;
@@ -394,13 +394,13 @@ 
 	 * type_color               - 15  (unused)
 	 *
 	 * --- mbuf fields ---       offset
-	 * rearm_data              ---- 16
+	 * mbuf_rearm_data            ---- 16
 	 * data_off    - 0      (mbuf_init) -+
 	 * refcnt      - 2      (mbuf_init)  |
 	 * nb_segs     - 4      (mbuf_init)  | 16B 128b
 	 * port        - 6      (mbuf_init)  |
 	 * ol_flag     - 8      (from cqd)  -+
-	 * rx_descriptor_fields1   ---- 32
+	 * mbuf_rx_descriptor_fields1 ---- 32
 	 * packet_type - 0      (from cqd)  -+
 	 * pkt_len     - 4      (from cqd)   |
 	 * data_len    - 8      (from cqd)   | 16B 128b
@@ -737,14 +737,14 @@ 
 		 * vlan_tci    - 26     (from cqd)
 		 * rss         - 28     (from cqd)
 		 */
-		_mm256_storeu_si256((__m256i *)&rxmb[0]->rearm_data, rearm0);
-		_mm256_storeu_si256((__m256i *)&rxmb[1]->rearm_data, rearm1);
-		_mm256_storeu_si256((__m256i *)&rxmb[2]->rearm_data, rearm2);
-		_mm256_storeu_si256((__m256i *)&rxmb[3]->rearm_data, rearm3);
-		_mm256_storeu_si256((__m256i *)&rxmb[4]->rearm_data, rearm4);
-		_mm256_storeu_si256((__m256i *)&rxmb[5]->rearm_data, rearm5);
-		_mm256_storeu_si256((__m256i *)&rxmb[6]->rearm_data, rearm6);
-		_mm256_storeu_si256((__m256i *)&rxmb[7]->rearm_data, rearm7);
+		_mm256_storeu_si256((__m256i *)&rxmb[0]->mbuf_rearm_data, rearm0);
+		_mm256_storeu_si256((__m256i *)&rxmb[1]->mbuf_rearm_data, rearm1);
+		_mm256_storeu_si256((__m256i *)&rxmb[2]->mbuf_rearm_data, rearm2);
+		_mm256_storeu_si256((__m256i *)&rxmb[3]->mbuf_rearm_data, rearm3);
+		_mm256_storeu_si256((__m256i *)&rxmb[4]->mbuf_rearm_data, rearm4);
+		_mm256_storeu_si256((__m256i *)&rxmb[5]->mbuf_rearm_data, rearm5);
+		_mm256_storeu_si256((__m256i *)&rxmb[6]->mbuf_rearm_data, rearm6);
+		_mm256_storeu_si256((__m256i *)&rxmb[7]->mbuf_rearm_data, rearm7);
 
 		max_rx -= 8;
 		cqd += 8;