diff mbox series

[v4,17/18] common/idpf: stop using zero sized marker fields

Message ID 1707978080-28859-18-git-send-email-roretzla@linux.microsoft.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series stop using zero sized marker fields |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tyler Retzlaff Feb. 15, 2024, 6:21 a.m. UTC 
Update to reference newly named anonymous union markers supported by
standard C and stop referencing zero sized compiler extension markers.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/common/idpf/idpf_common_rxtx.c        |  4 +-
 drivers/common/idpf/idpf_common_rxtx_avx512.c | 60 +++++++++++++--------------
 2 files changed, 32 insertions(+), 32 deletions(-)
diff mbox series

Patch

diff --git a/drivers/common/idpf/idpf_common_rxtx.c b/drivers/common/idpf/idpf_common_rxtx.c
index 83b131e..06f1e9d 100644
--- a/drivers/common/idpf/idpf_common_rxtx.c
+++ b/drivers/common/idpf/idpf_common_rxtx.c
@@ -1603,9 +1603,9 @@ 
 	mb_def.port = rxq->port_id;
 	rte_mbuf_refcnt_set(&mb_def, 1);
 
-	/* prevent compiler reordering: rearm_data covers previous fields */
+	/* prevent compiler reordering: mbuf_rearm_data covers previous fields */
 	rte_compiler_barrier();
-	p = (uintptr_t)&mb_def.rearm_data;
+	p = (uintptr_t)&mb_def.mbuf_rearm_data;
 	rxq->mbuf_initializer = *(uint64_t *)p;
 	return 0;
 }
diff --git a/drivers/common/idpf/idpf_common_rxtx_avx512.c b/drivers/common/idpf/idpf_common_rxtx_avx512.c
index f65e8d5..65c5bd1 100644
--- a/drivers/common/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/common/idpf/idpf_common_rxtx_avx512.c
@@ -313,13 +313,13 @@ 
 	 * calls above.
 	 */
 	RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=
-			 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);
+			 offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4);
 	RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=
-			 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);
+			 offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8);
 	RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) !=
-			 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 10);
+			 offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 10);
 	RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) !=
-			 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12);
+			 offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 12);
 
 	uint16_t i, received;
 
@@ -457,10 +457,10 @@ 
 		 */
 		/* check the structure matches expectations */
 		RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=
-				 offsetof(struct rte_mbuf, rearm_data) + 8);
-		RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=
+				 offsetof(struct rte_mbuf, mbuf_rearm_data) + 8);
+		RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, mbuf_rearm_data) !=
 				 RTE_ALIGN(offsetof(struct rte_mbuf,
-						    rearm_data),
+						    mbuf_rearm_data),
 						    16));
 		/* build up data and do writes */
 		__m256i rearm0, rearm1, rearm2, rearm3, rearm4, rearm5,
@@ -476,13 +476,13 @@ 
 		rearm0 = _mm256_permute2f128_si256(mbuf_init, mb0_1, 0x20);
 
 		/* write to mbuf */
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->mbuf_rearm_data,
 				    rearm6);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->mbuf_rearm_data,
 				    rearm4);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->mbuf_rearm_data,
 				    rearm2);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->mbuf_rearm_data,
 				    rearm0);
 
 		rearm7 = _mm256_blend_epi32(mbuf_init, mb6_7, 0xF0);
@@ -491,13 +491,13 @@ 
 		rearm1 = _mm256_blend_epi32(mbuf_init, mb0_1, 0xF0);
 
 		/* again write to mbufs */
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->mbuf_rearm_data,
 				    rearm7);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->mbuf_rearm_data,
 				    rearm5);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->mbuf_rearm_data,
 				    rearm3);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->mbuf_rearm_data,
 				    rearm1);
 
 		/* perform dd_check */
@@ -774,13 +774,13 @@ 
 	 * calls above.
 	 */
 	RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=
-			 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);
+			 offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4);
 	RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=
-			 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);
+			 offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8);
 	RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) !=
-			 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 10);
+			 offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 10);
 	RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) !=
-			 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12);
+			 offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 12);
 
 	uint16_t i, received;
 
@@ -917,10 +917,10 @@ 
 		 */
 		/* check the structure matches expectations */
 		RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=
-				 offsetof(struct rte_mbuf, rearm_data) + 8);
-		RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=
+				 offsetof(struct rte_mbuf, mbuf_rearm_data) + 8);
+		RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, mbuf_rearm_data) !=
 				 RTE_ALIGN(offsetof(struct rte_mbuf,
-						    rearm_data),
+						    mbuf_rearm_data),
 						    16));
 				/* build up data and do writes */
 		__m256i rearm0, rearm1, rearm2, rearm3, rearm4, rearm5,
@@ -936,13 +936,13 @@ 
 		rearm0 = _mm256_permute2f128_si256(mbuf_init, mb0_1, 0x20);
 
 		/* write to mbuf */
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->mbuf_rearm_data,
 				    rearm6);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->mbuf_rearm_data,
 				    rearm4);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->mbuf_rearm_data,
 				    rearm2);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->mbuf_rearm_data,
 				    rearm0);
 
 		rearm7 = _mm256_blend_epi32(mbuf_init, mb6_7, 0xF0);
@@ -951,13 +951,13 @@ 
 		rearm1 = _mm256_blend_epi32(mbuf_init, mb0_1, 0xF0);
 
 		/* again write to mbufs */
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->mbuf_rearm_data,
 				    rearm7);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->mbuf_rearm_data,
 				    rearm5);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->mbuf_rearm_data,
 				    rearm3);
-		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,
+		_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->mbuf_rearm_data,
 				    rearm1);
 
 		const __mmask8 dd_mask = _mm512_cmpeq_epi64_mask(