@@ -1595,7 +1595,6 @@
static inline int
idpf_rxq_vec_setup_default(struct idpf_rx_queue *rxq)
{
- uintptr_t p;
struct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */
mb_def.nb_segs = 1;
@@ -1605,8 +1604,7 @@
/* prevent compiler reordering: rearm_data covers previous fields */
rte_compiler_barrier();
- p = (uintptr_t)&mb_def.rearm_data;
- rxq->mbuf_initializer = *(uint64_t *)p;
+ rxq->mbuf_initializer = *rte_mbuf_rearm_data(&mb_def);
return 0;
}
@@ -307,19 +307,6 @@
/* octet 15~14, low 16 bits pkt_len */
0xFFFFFFFF /* pkt_type set as unknown */
);
- /**
- * compile-time check the shuffle layout is correct.
- * NOTE: the first field (lowest address) is given last in set_epi
- * calls above.
- */
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=
- offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=
- offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) !=
- offsetof(struct rte_mbuf, rx_descriptor_fields1) + 10);
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) !=
- offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12);
uint16_t i, received;
@@ -455,13 +442,7 @@
* add in the previously computed rx_descriptor fields to
* make a single 256-bit write per mbuf
*/
- /* check the structure matches expectations */
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=
- offsetof(struct rte_mbuf, rearm_data) + 8);
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=
- RTE_ALIGN(offsetof(struct rte_mbuf,
- rearm_data),
- 16));
+
/* build up data and do writes */
__m256i rearm0, rearm1, rearm2, rearm3, rearm4, rearm5,
rearm6, rearm7;
@@ -476,13 +457,13 @@
rearm0 = _mm256_permute2f128_si256(mbuf_init, mb0_1, 0x20);
/* write to mbuf */
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 6]),
rearm6);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 4]),
rearm4);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 2]),
rearm2);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 0]),
rearm0);
rearm7 = _mm256_blend_epi32(mbuf_init, mb6_7, 0xF0);
@@ -491,13 +472,13 @@
rearm1 = _mm256_blend_epi32(mbuf_init, mb0_1, 0xF0);
/* again write to mbufs */
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 7]),
rearm7);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 5]),
rearm5);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 3]),
rearm3);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 1]),
rearm1);
/* perform dd_check */
@@ -768,19 +749,6 @@
/* octet 15~14, low 16 bits pkt_len */
0xFFFFFFFF /* pkt_type set as unknown */
);
- /**
- * compile-time check the above crc and shuffle layout is correct.
- * NOTE: the first field (lowest address) is given last in set_epi
- * calls above.
- */
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=
- offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=
- offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) !=
- offsetof(struct rte_mbuf, rx_descriptor_fields1) + 10);
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) !=
- offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12);
uint16_t i, received;
@@ -915,13 +883,6 @@
* add in the previously computed rx_descriptor fields to
* make a single 256-bit write per mbuf
*/
- /* check the structure matches expectations */
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=
- offsetof(struct rte_mbuf, rearm_data) + 8);
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=
- RTE_ALIGN(offsetof(struct rte_mbuf,
- rearm_data),
- 16));
/* build up data and do writes */
__m256i rearm0, rearm1, rearm2, rearm3, rearm4, rearm5,
rearm6, rearm7;
@@ -936,13 +897,13 @@
rearm0 = _mm256_permute2f128_si256(mbuf_init, mb0_1, 0x20);
/* write to mbuf */
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 6]),
rearm6);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 4]),
rearm4);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 2]),
rearm2);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 0]),
rearm0);
rearm7 = _mm256_blend_epi32(mbuf_init, mb6_7, 0xF0);
@@ -951,13 +912,13 @@
rearm1 = _mm256_blend_epi32(mbuf_init, mb0_1, 0xF0);
/* again write to mbufs */
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 7]),
rearm7);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 5]),
rearm5);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 3]),
rearm3);
- _mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 1]),
rearm1);
const __mmask8 dd_mask = _mm512_cmpeq_epi64_mask(