diff mbox series

[1/2] net/mlx5: fix egress group translation in HWS

Message ID 20230225201810.10838-2-dsosnowski@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: fix representor matching |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Dariusz Sosnowski Feb. 25, 2023, 8:18 p.m. UTC 
  With HW Steering enabled creating egress template tables and
egress flow rules on E-Switch setups is allowed.
To enable it, PMD creates a set of default egress flow rules
responsible for:

- Storing representor ID (vport tag is used) in HW register.
  This is used for traffic source identification.
- Copying software metadata to proper HW register to allow
  preserving metadata across domains.

Structure of these flow rules and whether they are inserted
depend on the device configuration.
There are the following cases:

1. repr_matching=1 and dv_xmeta_en=4
   - An egress flow rule in group 0 is created for each Tx queue;
   - Flow rule matching SQ number - fills unused REG_C_0 bits
     with vport tag, copies REG_A to REG_C_1 and jumps to group 1.
2. repr_matching=1 and dv_xmeta_en=0
   - An egress flow rule in group 0 is created for each Tx queue;
   - Flow rule matching SQ number - fills unused REG_C_0 bits
     with vport tag and jumps to group 1.
3. repr_matching=0 and dv_xmeta_en=4
   - A single egress flow rule in group 0 is created;
   - Flow rule matches all E-Switch manager TX traffic,
     copies REG_A to REG_C and jumps to group 1.
4. repr_matching=0 and dv_xmeta_en=0 - no default flow rules are added.

When default egress flow rules are required, they are inserted in
group 0 and this group is reserved for PMD purposes.
User created template tables must be created in higher groups.
As a result, on template table creation PMD is translating
the provided group (incrementing it in that case).

Before this patch, a condition used to check if translation of egress
flow group is needed was incorrect. It did not allow translation
if both representor matching AND extended metadata mode were enabled.

This patch fixes this condition - translation is allowed if and only if
representor matching OR extended metadata mode is enabled.

Fixes: 483181f7b6dd ("net/mlx5: support device control of representor matching")
Cc: stable@dpdk.org

Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_hw.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

Comments

Suanming Mou March 8, 2023, 3:04 a.m. UTC | #1 
> -----Original Message-----
> From: Dariusz Sosnowski <dsosnowski@nvidia.com>
> Sent: Sunday, February 26, 2023 4:18 AM
> To: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; stable@dpdk.org; Ori Kam <orika@nvidia.com>
> Subject: [PATCH 1/2] net/mlx5: fix egress group translation in HWS
> 
> With HW Steering enabled creating egress template tables and egress flow rules
> on E-Switch setups is allowed.
> To enable it, PMD creates a set of default egress flow rules responsible for:
> 
> - Storing representor ID (vport tag is used) in HW register.
>   This is used for traffic source identification.
> - Copying software metadata to proper HW register to allow
>   preserving metadata across domains.
> 
> Structure of these flow rules and whether they are inserted depend on the
> device configuration.
> There are the following cases:
> 
> 1. repr_matching=1 and dv_xmeta_en=4
>    - An egress flow rule in group 0 is created for each Tx queue;
>    - Flow rule matching SQ number - fills unused REG_C_0 bits
>      with vport tag, copies REG_A to REG_C_1 and jumps to group 1.
> 2. repr_matching=1 and dv_xmeta_en=0
>    - An egress flow rule in group 0 is created for each Tx queue;
>    - Flow rule matching SQ number - fills unused REG_C_0 bits
>      with vport tag and jumps to group 1.
> 3. repr_matching=0 and dv_xmeta_en=4
>    - A single egress flow rule in group 0 is created;
>    - Flow rule matches all E-Switch manager TX traffic,
>      copies REG_A to REG_C and jumps to group 1.
> 4. repr_matching=0 and dv_xmeta_en=0 - no default flow rules are added.
> 
> When default egress flow rules are required, they are inserted in group 0 and
> this group is reserved for PMD purposes.
> User created template tables must be created in higher groups.
> As a result, on template table creation PMD is translating the provided group
> (incrementing it in that case).
> 
> Before this patch, a condition used to check if translation of egress flow group is
> needed was incorrect. It did not allow translation if both representor matching
> AND extended metadata mode were enabled.
> 
> This patch fixes this condition - translation is allowed if and only if representor
> matching OR extended metadata mode is enabled.
> 
> Fixes: 483181f7b6dd ("net/mlx5: support device control of representor
> matching")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
> Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Suanming Mou <suanmingm@nvidia.com>
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index a9c7045a3e..d3d86fe24d 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -3260,14 +3260,18 @@  flow_hw_translate_group(struct rte_eth_dev *dev,
 						  "group index not supported");
 		*table_group = group + 1;
 	} else if (config->dv_esw_en &&
-		   !(config->repr_matching && config->dv_xmeta_en == MLX5_XMETA_MODE_META32_HWS) &&
+		   (config->repr_matching || config->dv_xmeta_en == MLX5_XMETA_MODE_META32_HWS) &&
 		   cfg->external &&
 		   flow_attr->egress) {
 		/*
-		 * On E-Switch setups, egress group translation is not done if and only if
-		 * representor matching is disabled and legacy metadata mode is selected.
-		 * In all other cases, egree group 0 is reserved for representor tagging flows
-		 * and metadata copy flows.
+		 * On E-Switch setups, default egress flow rules are inserted to allow
+		 * representor matching and/or preserving metadata across steering domains.
+		 * These flow rules are inserted in group 0 and this group is reserved by PMD
+		 * for these purposes.
+		 *
+		 * As a result, if representor matching or extended metadata mode is enabled,
+		 * group provided by the user must be incremented to avoid inserting flow rules
+		 * in group 0.
 		 */
 		if (group > MLX5_HW_MAX_EGRESS_GROUP)
 			return rte_flow_error_set(error, EINVAL,