[13/14] pci: define some AER constants

Message ID 20230803075038.307012-14-david.marchand@redhat.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series Cleanup PCI(e) drivers |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

David Marchand Aug. 3, 2023, 7:50 a.m. UTC
  Define some Advanced Error Reporting constants and use them in existing
drivers.

Signed-off-by: David Marchand <david.marchand@redhat.com>
---
 drivers/event/dlb2/pf/dlb2_main.c | 10 +++-------
 lib/pci/rte_pci.h                 |  5 +++++
 2 files changed, 8 insertions(+), 7 deletions(-)
  

Patch

diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c
index 187a356c24..aa03e4c311 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -27,10 +27,6 @@ 
 #define NO_OWNER_VF 0	/* PF ONLY! */
 #define NOT_VF_REQ false /* PF ONLY! */
 
-#define DLB2_PCI_ERR_ROOT_STATUS         0x30
-#define DLB2_PCI_ERR_COR_STATUS          0x10
-#define DLB2_PCI_ERR_UNCOR_STATUS        0x4
-
 static int
 dlb2_pf_init_driver_state(struct dlb2_dev *dlb2_dev)
 {
@@ -399,7 +395,7 @@  dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
 	if (err_cap_offset >= 0) {
 		uint32_t tmp;
 
-		off = err_cap_offset + DLB2_PCI_ERR_ROOT_STATUS;
+		off = err_cap_offset + RTE_PCI_ERR_ROOT_STATUS;
 		if (rte_pci_read_config(pdev, &tmp, 4, off) != 4)
 			tmp = 0;
 
@@ -410,7 +406,7 @@  dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
 			return ret;
 		}
 
-		off = err_cap_offset + DLB2_PCI_ERR_COR_STATUS;
+		off = err_cap_offset + RTE_PCI_ERR_COR_STATUS;
 		if (rte_pci_read_config(pdev, &tmp, 4, off) != 4)
 			tmp = 0;
 
@@ -421,7 +417,7 @@  dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
 			return ret;
 		}
 
-		off = err_cap_offset + DLB2_PCI_ERR_UNCOR_STATUS;
+		off = err_cap_offset + RTE_PCI_ERR_UNCOR_STATUS;
 		if (rte_pci_read_config(pdev, &tmp, 4, off) != 4)
 			tmp = 0;
 
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index 0dc8733e1d..c7552a53eb 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -100,6 +100,11 @@  extern "C" {
 #define RTE_PCI_EXT_CAP_ID_SRIOV	0x10	/* SR-IOV*/
 #define RTE_PCI_EXT_CAP_ID_PRI		0x13	/* Page Request Interface */
 
+/* Advanced Error Reporting */
+#define RTE_PCI_ERR_UNCOR_STATUS	0x04	/* Uncorrectable Error Status */
+#define RTE_PCI_ERR_COR_STATUS		0x10	/* Correctable Error Status */
+#define RTE_PCI_ERR_ROOT_STATUS		0x30
+
 /* Access Control Service */
 #define RTE_PCI_ACS_CAP			0x04	/* ACS Capability Register */
 #define RTE_PCI_ACS_CTRL		0x06	/* ACS Control Register */