diff mbox series

[23/31] net/cnxk: support rate limit in PFC TM tree

Message ID 20230811085805.441256-23-ndabilpuram@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [01/31] common/cnxk: add aura ref count mechanism |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Nithin Dabilpuram Aug. 11, 2023, 8:57 a.m. UTC 
  From: Satha Rao <skoteshwar@marvell.com>

SQ rate limit was different in PFC tree compared to regular rate
limit tree.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
---
 drivers/net/cnxk/cnxk_tm.c | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/drivers/net/cnxk/cnxk_tm.c b/drivers/net/cnxk/cnxk_tm.c
index 9d8cd3f0a9..c799193cb8 100644
--- a/drivers/net/cnxk/cnxk_tm.c
+++ b/drivers/net/cnxk/cnxk_tm.c
@@ -765,6 +765,9 @@  cnxk_nix_tm_set_queue_rate_limit(struct rte_eth_dev *eth_dev,
 	if (queue_idx >= eth_dev->data->nb_tx_queues)
 		goto exit;
 
+	if (roc_nix_tm_tree_type_get(nix) == ROC_NIX_TM_PFC)
+		return roc_nix_tm_pfc_rlimit_sq(nix, queue_idx, tx_rate);
+
 	if ((roc_nix_tm_tree_type_get(nix) != ROC_NIX_TM_RLIMIT) &&
 	    eth_dev->data->nb_tx_queues > 1) {
 		/*