[2/2] net/mlx5: add random item support
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Commit Message
Add support for random item in HWS mode.
Signed-off-by: Michael Baum <michaelba@nvidia.com>
---
doc/guides/nics/features/mlx5.ini | 1 +
doc/guides/nics/mlx5.rst | 10 +++++++++-
doc/guides/rel_notes/release_23_11.rst | 4 ++++
drivers/net/mlx5/mlx5_flow_dv.c | 5 +++++
drivers/net/mlx5/mlx5_flow_hw.c | 5 +++++
5 files changed, 24 insertions(+), 1 deletion(-)
Comments
> -----Original Message-----
> From: Michael Baum <michaelba@nvidia.com>
> Sent: Tuesday, August 22, 2023 1:36 PM
> Add support for random item in HWS mode.
>
> Signed-off-by: Michael Baum <michaelba@nvidia.com>
> ---
Acked-by: Ori Kam <orika@nvidia.com>
Best,
Ori
@@ -86,6 +86,7 @@ nvgre = Y
port_id = Y
port_representor = Y
quota = Y
+random = Y
tag = Y
tcp = Y
udp = Y
@@ -165,7 +165,7 @@ Features
- Sub-Function.
- Matching on represented port.
- Matching on aggregated affinity.
-
+- Matching on random value.
Limitations
-----------
@@ -554,6 +554,7 @@ Limitations
- Modification of the MPLS header is supported only in HWS and only to copy from,
the encapsulation level is always 0.
- Modification of the 802.1Q Tag, VXLAN Network or GENEVE Network ID's is not supported.
+ - Modify field action using ``RTE_FLOW_FIELD_RANDOM`` is not supported.
- Encapsulation levels are not supported, can modify outermost header fields only.
- Offsets cannot skip past the boundary of a field.
- If the field type is ``RTE_FLOW_FIELD_MAC_TYPE``
@@ -712,6 +713,13 @@ Limitations
- The NIC egress flow rules on representor port are not supported.
+- Match on random value:
+
+ - Supported only with HW Steering enabled (``dv_flow_en`` = 2).
+ - Supported only in table with ``nb_flows=1``.
+ - NIC ingress flow in group 0 is not supported.
+ - Supports matching only 16 bits (LSB).
+
- During live migration to a new process set its flow engine as standby mode,
the user should only program flow rules in group 0 (``fdb_def_rule_en=0``).
Live migration is only supported under SWS (``dv_flow_en=1``).
@@ -76,6 +76,10 @@ New Features
Added ``RTE_FLOW_ITEM_RANDOM`` to match random value.
+* **Updated NVIDIA mlx5 net driver.**
+
+ * Added support for random value matching.
+
Removed Items
-------------
@@ -5385,6 +5385,11 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
RTE_FLOW_ERROR_TYPE_ACTION, action,
"modifications of the MPLS header "
"is not supported");
+ if (dst_data->field == RTE_FLOW_FIELD_RANDOM ||
+ src_data->field == RTE_FLOW_FIELD_RANDOM)
+ return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION, action,
+ "modifications of random value is not supported");
if (dst_data->field == RTE_FLOW_FIELD_MARK ||
src_data->field == RTE_FLOW_FIELD_MARK)
if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
@@ -3893,6 +3893,10 @@ flow_hw_validate_action_modify_field(const struct rte_flow_action *action,
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ACTION, action,
"modifying Geneve VNI is not supported");
+ if (flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_RANDOM))
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ACTION, action,
+ "modifying random value is not supported");
/* Due to HW bug, tunnel MPLS header is read only. */
if (action_conf->dst.field == RTE_FLOW_FIELD_MPLS)
return rte_flow_error_set(error, EINVAL,
@@ -5375,6 +5379,7 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,
case RTE_FLOW_ITEM_TYPE_ESP:
case RTE_FLOW_ITEM_TYPE_FLEX:
case RTE_FLOW_ITEM_TYPE_IB_BTH:
+ case RTE_FLOW_ITEM_TYPE_RANDOM:
break;
case RTE_FLOW_ITEM_TYPE_INTEGRITY:
/*