net/mlx5/hws: enable multiple integrity items

Message ID 20240228095055.3108270-1-michaelba@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5/hws: enable multiple integrity items |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/intel-Functional success Functional PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-sample-apps-testing success Testing PASS

Commit Message

Michael Baum Feb. 28, 2024, 9:50 a.m. UTC
  The integrity item uses the DW "oks1" in header layout. It includes the
all supported bits for both inner and outer. When item is integrity
type, the relevant bits are turned on and all DW is submitted.

When user provides more then single integrity item in same pattern, the
last one overrides the values were submitted before. This is problematic
when user wants to match integrity bits for both inner and outer in same
pattern, he cannot merge them into single item since rte_flow API
provides encapsulation level field to match either inner or outer.

This patch avoids the overriding values, when "oks1" is submitted,
operator "or" is used instead of regular set.

Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
Cc: valex@nvidia.com
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_definer.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
  

Comments

Raslan Darawsheh Feb. 28, 2024, 1:53 p.m. UTC | #1
Hi,

> -----Original Message-----
> From: Michael Baum <michaelba@nvidia.com>
> Sent: Wednesday, February 28, 2024 11:51 AM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Dariusz Sosnowski
> <dsosnowski@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>; Slava
> Ovsiienko <viacheslavo@nvidia.com>; Ori Kam <orika@nvidia.com>;
> Suanming Mou <suanmingm@nvidia.com>; Alex Vesker <valex@nvidia.com>;
> stable@dpdk.org; Erez Shitrit <erezsh@nvidia.com>
> Subject: [PATCH] net/mlx5/hws: enable multiple integrity items
> 
> The integrity item uses the DW "oks1" in header layout. It includes the all
> supported bits for both inner and outer. When item is integrity type, the
> relevant bits are turned on and all DW is submitted.
> 
> When user provides more then single integrity item in same pattern, the last
> one overrides the values were submitted before. This is problematic when user
> wants to match integrity bits for both inner and outer in same pattern, he
> cannot merge them into single item since rte_flow API provides encapsulation
> level field to match either inner or outer.
> 
> This patch avoids the overriding values, when "oks1" is submitted, operator
> "or" is used instead of regular set.
> 
> Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
> Cc: valex@nvidia.com
> Cc: stable@dpdk.org
> 
> Signed-off-by: Michael Baum <michaelba@nvidia.com>
> Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>
Patch applied to next-net-mlx,

Kindest regards
Raslan Darawsheh
  

Patch

diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index e036aca781..0e15aafb8a 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -44,6 +44,10 @@ 
 				  (bit_off))); \
 	} while (0)
 
+/* Getter function based on bit offset and mask, for 32bit DW*/
+#define DR_GET_32(p, byte_off, bit_off, mask) \
+	((rte_be_to_cpu_32(*((const rte_be32_t *)(p) + ((byte_off) / 4))) >> (bit_off)) & (mask))
+
 /* Setter function based on bit offset and mask */
 #define DR_SET(p, v, byte_off, bit_off, mask) \
 	do { \
@@ -509,7 +513,7 @@  mlx5dr_definer_integrity_set(struct mlx5dr_definer_fc *fc,
 {
 	bool inner = (fc->fname == MLX5DR_DEFINER_FNAME_INTEGRITY_I);
 	const struct rte_flow_item_integrity *v = item_spec;
-	uint32_t ok1_bits = 0;
+	uint32_t ok1_bits = DR_GET_32(tag, fc->byte_off, fc->bit_off, fc->bit_mask);
 
 	if (v->l3_ok)
 		ok1_bits |= inner ? BIT(MLX5DR_DEFINER_OKS1_SECOND_L3_OK) :