Message ID | 20210810025140.1698163-6-qi.z.zhang@intel.com (mailing list archive) |
---|---|
State | Accepted, archived |
Delegated to: | Qi Zhang |
Headers | show |
Series | ice: base code update | expand |
Context | Check | Description |
---|---|---|
ci/checkpatch | success | coding style OK |
> -----Original Message----- > From: Zhang, Qi Z <qi.z.zhang@intel.com> > Sent: Tuesday, August 10, 2021 10:51 > To: Yang, Qiming <qiming.yang@intel.com> > Cc: Guo, Junfeng <junfeng.guo@intel.com>; dev@dpdk.org; Zhang, Qi Z > <qi.z.zhang@intel.com>; Sridhar, Vignesh <vignesh.sridhar@intel.com> > Subject: [PATCH 05/28] net/ice/base: add timestamp masks > > Adding macros for shift and masking of the lower timestamp work in the > Rx flex descriptor. The LSB of the timestamp-low word indicates the > validity of the timestamp while the rest 7 bits contain the timestamp. > > Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > --- > drivers/net/ice/base/ice_lan_tx_rx.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > -- > 2.26.2 Acked-by: Junfeng Guo <junfeng.guo@intel.com> Regards, Junfeng Guo
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index 696c6a30ae..4255e9963e 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -879,6 +879,14 @@ enum ice_rx_flex_desc_exstat_bits { ICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3, }; +/* For ice_32b_rx_flex_desc.ts_low: + * [0]: Timestamp-low validity bit + * [1:7]: Timestamp-low value + */ +#define ICE_RX_FLEX_DESC_TS_L_VALID_S 0x01 +#define ICE_RX_FLEX_DESC_TS_L_VALID_M ICE_RX_FLEX_DESC_TS_L_VALID_S +#define ICE_RX_FLEX_DESC_TS_L_M 0xFE + #define ICE_RXQ_CTX_SIZE_DWORDS 8 #define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32)) #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS 22