[1/5] common/cnxk: add err ctl

Message ID 20220131123029.4024-2-ktejasree@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series Adding new features and improvements in cnxk crypto PMD |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tejasree Kondoj Jan. 31, 2022, 12:30 p.m. UTC
  From: Anoob Joseph <anoobj@marvell.com>

Add err ctl field in SA context.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
---
 drivers/common/cnxk/cnxk_security.c |  6 ++++--
 drivers/common/cnxk/roc_ie_ot.h     | 17 ++++++++++++++++-
 2 files changed, 20 insertions(+), 3 deletions(-)
  

Patch

diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c
index 6ebf0846f5..035d61180a 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -500,8 +500,10 @@  cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa,
 	offset = offsetof(struct roc_ot_ipsec_outb_sa, ctx);
 	/* Word offset for HW managed SA field */
 	sa->w0.s.hw_ctx_off = offset / 8;
-	/* Context push size is up to hmac_opad_ipad */
-	sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off;
+
+	/* Context push size is up to err ctl in HW ctx */
+	sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off + 1;
+
 	/* Entire context size in 128B units */
 	offset = sizeof(struct roc_ot_ipsec_outb_sa);
 	sa->w0.s.ctx_size = (PLT_ALIGN_CEIL(offset, ROC_CTX_UNIT_128B) /
diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h
index 923656f4a5..c502c7983f 100644
--- a/drivers/common/cnxk/roc_ie_ot.h
+++ b/drivers/common/cnxk/roc_ie_ot.h
@@ -153,6 +153,13 @@  enum {
 	ROC_IE_OT_REAS_STS_L3P_ERR = 8,
 	ROC_IE_OT_REAS_STS_MAX = 9
 };
+
+enum {
+	ROC_IE_OT_ERR_CTL_MODE_NONE = 0,
+	ROC_IE_OT_ERR_CTL_MODE_CLEAR = 1,
+	ROC_IE_OT_ERR_CTL_MODE_RING = 2,
+};
+
 /* Context units in bytes */
 #define ROC_CTX_UNIT_8B		  8
 #define ROC_CTX_UNIT_128B	  128
@@ -235,7 +242,15 @@  union roc_ot_ipsec_outb_iv {
 };
 
 struct roc_ot_ipsec_outb_ctx_update_reg {
-	uint64_t rsvd;
+	union {
+		struct {
+			uint64_t reserved_0_2 : 3;
+			uint64_t address : 57;
+			uint64_t mode : 4;
+		} s;
+		uint64_t u64;
+	} err_ctl;
+
 	uint64_t esn_val;
 	uint64_t hard_life;
 	uint64_t soft_life;