diff mbox series

[5/5] crypto/cnxk: fix updation of number of descriptors

Message ID 20220131123029.4024-6-ktejasree@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series Adding new features and improvements in cnxk crypto PMD |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS

Commit Message

Tejasree Kondoj Jan. 31, 2022, 12:30 p.m. UTC 
  From: Anoob Joseph <anoobj@marvell.com>

Pending queue also need to be adjusted while updating the number of
descriptors.

Fixes: a455fd869cd7 ("common/cnxk: align CPT queue depth to power of 2")
Cc: anoobj@marvell.com

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
---
 drivers/common/cnxk/roc_cpt.c            | 3 ---
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 8 ++++++--
 2 files changed, 6 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 1bc7a29ef9..4e24850366 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -568,9 +568,6 @@  cpt_lf_init(struct roc_cpt_lf *lf)
 	if (lf->nb_desc == 0 || lf->nb_desc > CPT_LF_MAX_NB_DESC)
 		lf->nb_desc = CPT_LF_DEFAULT_NB_DESC;
 
-	/* Update nb_desc to next power of 2 to aid in pending queue checks */
-	lf->nb_desc = plt_align32pow2(lf->nb_desc);
-
 	/* Allocate memory for instruction queue for CPT LF. */
 	iq_mem = plt_zmalloc(cpt_lf_iq_mem_calc(lf->nb_desc), ROC_ALIGN);
 	if (iq_mem == NULL)
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 67a2d9b08e..a5fb68da02 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -361,6 +361,7 @@  cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 	struct roc_cpt *roc_cpt = &vf->cpt;
 	struct rte_pci_device *pci_dev;
 	struct cnxk_cpt_qp *qp;
+	uint32_t nb_desc;
 	int ret;
 
 	if (dev->data->queue_pairs[qp_id] != NULL)
@@ -373,14 +374,17 @@  cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 		return -EIO;
 	}
 
-	qp = cnxk_cpt_qp_create(dev, qp_id, conf->nb_descriptors);
+	/* Update nb_desc to next power of 2 to aid in pending queue checks */
+	nb_desc = plt_align32pow2(conf->nb_descriptors);
+
+	qp = cnxk_cpt_qp_create(dev, qp_id, nb_desc);
 	if (qp == NULL) {
 		plt_err("Could not create queue pair %d", qp_id);
 		return -ENOMEM;
 	}
 
 	qp->lf.lf_id = qp_id;
-	qp->lf.nb_desc = conf->nb_descriptors;
+	qp->lf.nb_desc = nb_desc;
 
 	ret = roc_cpt_lf_init(roc_cpt, &qp->lf);
 	if (ret < 0) {