[9/9] common/cnxk: skip L4 checks on inline IPsec traffic
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Commit Message
Skip L4 checks on inline IPsec traffic as even first fragment
is set as valid ESP packet in order to send it via CPT.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/common/cnxk/roc_nix_inl_dev.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
Comments
On Mon, Jan 16, 2023 at 3:11 PM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> Skip L4 checks on inline IPsec traffic as even first fragment
> is set as valid ESP packet in order to send it via CPT.
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
1) Squashed 1/9 with old patch in next-net-mrvl tree.
2) Updated the git commit as follows and applied to
dpdk-next-net-mrvl/for-next-net. Thanks
commit ab3e743050dce3a1a4d0d4f97b3bf8bf7bebdbed (HEAD -> for-next-net)
Author: Nithin Dabilpuram <ndabilpuram@marvell.com>
Date: Mon Jan 16 15:09:54 2023 +0530
common/cnxk: skip L4 checks on inline IPsec traffic
Skip L4 checks on inline IPsec traffic as even first fragment
is set as valid ESP packet in order to send it via CPT.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
commit 8fee49a7d6cff3e5ed318cca3b6c6f9080eadab8
Author: Rakesh Kudurumalla <rkudurumalla@marvell.com>
Date: Mon Jan 16 15:09:53 2023 +0530
net/cnxk: make flow control op for SDP as no-op
No action is taken when application calls rte_eth_dev_flow_ctrl_get(),
for SDP port which is inline with rte_eth_dev_flow_ctrl_set() for SDP port.
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
commit be0e9b93ccb3b64d8db63fe959c75bd9ecf50a66
Author: Srujana Challa <schalla@marvell.com>
Date: Mon Jan 16 15:09:52 2023 +0530
common/cnxk: update CPT inbound inline IPsec mailbox
Updates CPT inbound inline configuration mailbox message
format to set CPT credit threshold and BPID, which are
introduced for CN10KB.
This patch also fixes inline inbound config read API.
Fixes: 37da58509579 ("common/cnxk: update inbound inline IPsec
config mailbox")
Cc: stable@dpdk.org
Signed-off-by: Srujana Challa <schalla@marvell.com>
commit e7358efc558165b5817c90f6fa390fb62d7f6ebd
Author: Nithin Dabilpuram <ndabilpuram@marvell.com>
Date: Mon Jan 16 15:09:51 2023 +0530
common/cnxk: free TM resources in order from leaf to root
Now that kernel AF driver is clearing parent info that is needed
for flush, free the resources in order from leaf to root so that
when SMQ flush is called there is always hierarchy present
from SMQ till TL1.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
commit f3f10aa02371da3cb72be8b07240d84ea36a2abf
Author: Nithin Dabilpuram <ndabilpuram@marvell.com>
Date: Mon Jan 16 15:09:50 2023 +0530
common/cnxk: dump inline device RQ context
Dump inline device RQ context along with ethdev's RQ context.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
commit bae0401959e5c1f82c282f603c26524809e9cc99
Author: Rakesh Kudurumalla <rkudurumalla@marvell.com>
Date: Mon Jan 16 15:09:49 2023 +0530
net/cnxk: reset PFC mode and flow control
Reset PFC and flow control if PFC mode and flow control are set
respectively during uninitialization of PF or VF.
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
commit ce56e8de6c1f4768235915e1a0d554c9788fee24
Author: Satha Rao <skoteshwar@marvell.com>
Date: Mon Jan 16 15:09:48 2023 +0530
common/cnxk: configure FC hysteresis bits
New parameter added inside SQ structure to control the fc_hyst_bits.
Instead of count on all updates each SQ can tune this own hysteresis
level.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
commit 2c746a47bd4a2c5eb6a35ad9f391a288bf24a14a
Author: Satha Rao <skoteshwar@marvell.com>
Date: Mon Jan 16 15:09:47 2023 +0530
common/cnxk: enable CQ late BP with valid CPT BPID
When FC enable requested for CPT, mbox returns allocated BPID.
While configuring CQ consider this value to enable late back pressure.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
> ---
> drivers/common/cnxk/roc_nix_inl_dev.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c
> index b340b92e77..6f60961bc7 100644
> --- a/drivers/common/cnxk/roc_nix_inl_dev.c
> +++ b/drivers/common/cnxk/roc_nix_inl_dev.c
> @@ -13,9 +13,7 @@
> #define NIX_INL_LF_RX_CFG \
> (ROC_NIX_LF_RX_CFG_DROP_RE | ROC_NIX_LF_RX_CFG_L2_LEN_ERR | \
> ROC_NIX_LF_RX_CFG_IP6_UDP_OPT | ROC_NIX_LF_RX_CFG_DIS_APAD | \
> - ROC_NIX_LF_RX_CFG_CSUM_IL4 | ROC_NIX_LF_RX_CFG_CSUM_OL4 | \
> - ROC_NIX_LF_RX_CFG_LEN_IL4 | ROC_NIX_LF_RX_CFG_LEN_IL3 | \
> - ROC_NIX_LF_RX_CFG_LEN_OL4 | ROC_NIX_LF_RX_CFG_LEN_OL3)
> + ROC_NIX_LF_RX_CFG_LEN_IL3 | ROC_NIX_LF_RX_CFG_LEN_OL3)
>
> extern uint32_t soft_exp_consumer_cnt;
> static bool soft_exp_poll_thread_exit = true;
> --
> 2.25.1
>
@@ -13,9 +13,7 @@
#define NIX_INL_LF_RX_CFG \
(ROC_NIX_LF_RX_CFG_DROP_RE | ROC_NIX_LF_RX_CFG_L2_LEN_ERR | \
ROC_NIX_LF_RX_CFG_IP6_UDP_OPT | ROC_NIX_LF_RX_CFG_DIS_APAD | \
- ROC_NIX_LF_RX_CFG_CSUM_IL4 | ROC_NIX_LF_RX_CFG_CSUM_OL4 | \
- ROC_NIX_LF_RX_CFG_LEN_IL4 | ROC_NIX_LF_RX_CFG_LEN_IL3 | \
- ROC_NIX_LF_RX_CFG_LEN_OL4 | ROC_NIX_LF_RX_CFG_LEN_OL3)
+ ROC_NIX_LF_RX_CFG_LEN_IL3 | ROC_NIX_LF_RX_CFG_LEN_OL3)
extern uint32_t soft_exp_consumer_cnt;
static bool soft_exp_poll_thread_exit = true;