diff mbox series

[13/30] net/mlx5: add validation support for tags

Message ID	20231029163202.216450-13-getelson@nvidia.com (mailing list archive)
State	Superseded, archived
Delegated to:	Raslan Darawsheh
Headers	Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C From: Gregory Etelson <getelson@nvidia.com> To: <dev@dpdk.org> CC: <getelson@nvidia.com>, <mkashani@nvidia.com>, <rasland@nvidia.com>, "Ori Kam" <orika@nvidia.com>, Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Suanming Mou <suanmingm@nvidia.com> Subject: [PATCH 13/30] net/mlx5: add validation support for tags Date: Sun, 29 Oct 2023 18:31:45 +0200 Message-ID: <20231029163202.216450-13-getelson@nvidia.com> In-Reply-To: <20231029163202.216450-1-getelson@nvidia.com> References: <20231029163202.216450-1-getelson@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: list Errors-To: dev-bounces@dpdk.org
Series	[01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data \| [01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data [02/30] net/mlx5: add flow_hw_get_reg_id_from_ctx() [03/30] net/mlx5/hws: Definer, use flow_hw_get_reg_id_from_ctx function call [04/30] net/mlx5: add rte_device parameter to locate HWS registers [05/30] net/mlx5: separate port REG_C registers usage [06/30] net/mlx5: merge REG_C aliases [07/30] net/mlx5: initialize HWS flow tags registers in shared dev context [08/30] net/mlx5/hws: adding method to query rule hash [09/30] net/mlx5: add support for calc hash [10/30] net/mlx5: fix insert by index [11/30] net/mlx5: fix query for NIC flow cap [12/30] net/mlx5: add support for more registers [13/30] net/mlx5: add validation support for tags [14/30] net/mlx5: reuse reformat and modify header actions in a table [15/30] net/mlx5/hws: check the rule status on rule update [16/30] net/mlx5/hws: support IPsec encryption/decryption action [17/30] net/mlx5/hws: support ASO IPsec action [18/30] net/mlx5/hws: support reformat trailer action [19/30] net/mlx5/hws: support ASO first hit action [20/30] net/mlx5/hws: support insert header action [21/30] net/mlx5/hws: support remove header action [22/30] net/mlx5/hws: allow jump to TIR over FDB [23/30] net/mlx5/hws: support dynamic re-parse [24/30] net/mlx5/hws: dynamic re-parse for modify header [25/30] net/mlx5: sample the srv6 last segment [26/30] net/mlx5/hws: fix potential wrong errno value [27/30] net/mlx5/hws: add IPv6 routing extension push remove actions [28/30] net/mlx5/hws: add setter for IPv6 routing push remove [29/30] net/mlx5: implement IPv6 routing push remove [30/30] net/mlx5/hws: add stc reparse support for srv6 push pop

Checks

Context	Check	Description
ci/checkpatch	warning	coding style issues

Commit Message

Etelson, Gregory Oct. 29, 2023, 4:31 p.m. UTC

From: Ori Kam <orika@nvidia.com>

This commit introduce validation for invalid tags

Signed-off-by: Ori Kam <orika@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_hw.c | 30 +++++++++++++++++++++++++++---
 1 file changed, 27 insertions(+), 3 deletions(-)

diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index ceeb82a649..6fc649d736 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -4049,7 +4049,8 @@  flow_hw_modify_field_is_used(const struct rte_flow_action_modify_field *action,
 }
 
 static int
-flow_hw_validate_action_modify_field(const struct rte_flow_action *action,
+flow_hw_validate_action_modify_field(struct rte_eth_dev *dev,
+				     const struct rte_flow_action *action,
 				     const struct rte_flow_action *mask,
 				     struct rte_flow_error *error)
 {
@@ -4118,6 +4119,22 @@  flow_hw_validate_action_modify_field(const struct rte_flow_action *action,
 		if (ret)
 			return ret;
 	}
+	if ((action_conf->dst.field == RTE_FLOW_FIELD_TAG &&
+	     action_conf->dst.tag_index >= MLX5_FLOW_HW_TAGS_MAX &&
+	     action_conf->dst.tag_index != MLX5_LINEAR_HASH_TAG_INDEX) ||
+	    (action_conf->src.field == RTE_FLOW_FIELD_TAG &&
+	     action_conf->src.tag_index >= MLX5_FLOW_HW_TAGS_MAX &&
+	     action_conf->src.tag_index != MLX5_LINEAR_HASH_TAG_INDEX))
+		return rte_flow_error_set(error, EINVAL,
+					  RTE_FLOW_ERROR_TYPE_ACTION, action,
+				 "tag index is out of range");
+	if ((action_conf->dst.field == RTE_FLOW_FIELD_TAG &&
+	     flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG, action_conf->dst.tag_index) == REG_NON) ||
+	    (action_conf->src.field == RTE_FLOW_FIELD_TAG &&
+	     flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG, action_conf->src.tag_index) == REG_NON))
+		return rte_flow_error_set(error, EINVAL,
+					  RTE_FLOW_ERROR_TYPE_ACTION, action,
+					  "tag index is out of range");
 	if (mask_conf->width != UINT32_MAX)
 		return rte_flow_error_set(error, EINVAL,
 				RTE_FLOW_ERROR_TYPE_ACTION, action,
@@ -4728,7 +4745,7 @@  mlx5_flow_hw_actions_validate(struct rte_eth_dev *dev,
 			action_flags |= MLX5_FLOW_ACTION_METER;
 			break;
 		case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
-			ret = flow_hw_validate_action_modify_field(action, mask,
+			ret = flow_hw_validate_action_modify_field(dev, action, mask,
 								   error);
 			if (ret < 0)
 				return ret;
@@ -5596,7 +5613,14 @@  flow_hw_pattern_validate(struct rte_eth_dev *dev,
 			if (tag == NULL)
 				return rte_flow_error_set(error, EINVAL,
 							  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
-							  NULL, "Tag spec is NULL");
+							  NULL,
+							  "Tag spec is NULL");
+			if (tag->index >= MLX5_FLOW_HW_TAGS_MAX &&
+			    tag->index != MLX5_LINEAR_HASH_TAG_INDEX)
+				return rte_flow_error_set(error, EINVAL,
+							  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
+							  NULL,
+							  "Invalid tag index");
 			tag_idx = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG, tag->index);
 			if (tag_idx == REG_NON)
 				return rte_flow_error_set(error, EINVAL,