Add support for HWS GENEVE options for flex parser profile 0 and group
0.
This patch avoids parser creation during matcher/flow preparation for HW
steering (MLX5_SET_MATCHER_HS) and removes some logic done in
"flow_dev_geneve_tlv_option_resource_*()" functions when dv_flow_en=2.
After this change, those functions became static and they were removed
from header file.
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Suanming Mou <suanmingm@nvidia.com>
---
drivers/net/mlx5/mlx5.c | 8 +-------
drivers/net/mlx5/mlx5_flow.h | 4 ----
drivers/net/mlx5/mlx5_flow_dv.c | 24 +++++++++++-------------
3 files changed, 12 insertions(+), 24 deletions(-)
@@ -2049,13 +2049,7 @@ mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh)
} while (++i <= sh->bond.n_port);
if (sh->td)
claim_zero(mlx5_devx_cmd_destroy(sh->td));
-#ifdef HAVE_MLX5_HWS_SUPPORT
- /* HWS manages geneve_tlv_option resource as global. */
- if (sh->config.dv_flow_en == 2)
- flow_dev_geneve_tlv_option_resource_release(sh);
- else
-#endif
- MLX5_ASSERT(sh->geneve_tlv_option_resource == NULL);
+ MLX5_ASSERT(sh->geneve_tlv_option_resource == NULL);
pthread_mutex_destroy(&sh->txpp.mutex);
mlx5_lwm_unset(sh);
mlx5_physical_device_destroy(sh->phdev);
@@ -2832,10 +2832,6 @@ void flow_hw_grp_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry);
struct mlx5_aso_age_action *flow_aso_age_get_by_idx(struct rte_eth_dev *dev,
uint32_t age_idx);
-int flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
- const struct rte_flow_item *item,
- struct rte_flow_error *error);
-void flow_dev_geneve_tlv_option_resource_release(struct mlx5_dev_ctx_shared *sh);
void flow_release_workspace(void *data);
int mlx5_flow_os_init_workspace_once(void);
@@ -9998,7 +9998,7 @@ flow_dv_translate_item_geneve(void *key, const struct rte_flow_item *item,
/**
* Create Geneve TLV option resource.
*
- * @param dev[in, out]
+ * @param[in, out] dev
* Pointer to rte_eth_dev structure.
* @param[in] item
* Flow pattern to translate.
@@ -10008,8 +10008,7 @@ flow_dv_translate_item_geneve(void *key, const struct rte_flow_item *item,
* @return
* 0 on success otherwise -errno and errno is set.
*/
-
-int
+static int
flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
const struct rte_flow_item *item,
struct rte_flow_error *error)
@@ -10022,6 +10021,7 @@ flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
int ret = 0;
+ MLX5_ASSERT(sh->config.dv_flow_en == 1);
if (!geneve_opt_v)
return -1;
rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
@@ -10032,13 +10032,8 @@ flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
geneve_opt_v->option_type &&
geneve_opt_resource->length ==
geneve_opt_v->option_len) {
- /*
- * We already have GENEVE TLV option obj allocated.
- * Increasing refcnt only in SWS. HWS uses it as global.
- */
- if (priv->sh->config.dv_flow_en == 1)
- __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
- __ATOMIC_RELAXED);
+ __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
+ __ATOMIC_RELAXED);
} else {
ret = rte_flow_error_set(error, ENOMEM,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
@@ -10117,8 +10112,11 @@ flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *key,
return -1;
MLX5_ITEM_UPDATE(item, key_type, geneve_opt_v, geneve_opt_m,
&rte_flow_item_geneve_opt_mask);
- /* Register resource requires item spec. */
- if (key_type & MLX5_SET_MATCHER_V) {
+ /*
+ * Register resource requires item spec for SW steering,
+ * for HW steering resources is registered explicitly by user.
+ */
+ if (key_type & MLX5_SET_MATCHER_SW_V) {
ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
error);
if (ret) {
@@ -15900,7 +15898,7 @@ flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
&resource->entry);
}
-void
+static void
flow_dev_geneve_tlv_option_resource_release(struct mlx5_dev_ctx_shared *sh)
{
struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =