@@ -11,6 +11,80 @@
#define ICE_PF_RESET_WAIT_COUNT 300
+static const char * const ice_link_mode_str_low[] = {
+ ice_arr_elem_idx(0, "100BASE_TX"),
+ ice_arr_elem_idx(1, "100M_SGMII"),
+ ice_arr_elem_idx(2, "1000BASE_T"),
+ ice_arr_elem_idx(3, "1000BASE_SX"),
+ ice_arr_elem_idx(4, "1000BASE_LX"),
+ ice_arr_elem_idx(5, "1000BASE_KX"),
+ ice_arr_elem_idx(6, "1G_SGMII"),
+ ice_arr_elem_idx(7, "2500BASE_T"),
+ ice_arr_elem_idx(8, "2500BASE_X"),
+ ice_arr_elem_idx(9, "2500BASE_KX"),
+ ice_arr_elem_idx(10, "5GBASE_T"),
+ ice_arr_elem_idx(11, "5GBASE_KR"),
+ ice_arr_elem_idx(12, "10GBASE_T"),
+ ice_arr_elem_idx(13, "10G_SFI_DA"),
+ ice_arr_elem_idx(14, "10GBASE_SR"),
+ ice_arr_elem_idx(15, "10GBASE_LR"),
+ ice_arr_elem_idx(16, "10GBASE_KR_CR1"),
+ ice_arr_elem_idx(17, "10G_SFI_AOC_ACC"),
+ ice_arr_elem_idx(18, "10G_SFI_C2C"),
+ ice_arr_elem_idx(19, "25GBASE_T"),
+ ice_arr_elem_idx(20, "25GBASE_CR"),
+ ice_arr_elem_idx(21, "25GBASE_CR_S"),
+ ice_arr_elem_idx(22, "25GBASE_CR1"),
+ ice_arr_elem_idx(23, "25GBASE_SR"),
+ ice_arr_elem_idx(24, "25GBASE_LR"),
+ ice_arr_elem_idx(25, "25GBASE_KR"),
+ ice_arr_elem_idx(26, "25GBASE_KR_S"),
+ ice_arr_elem_idx(27, "25GBASE_KR1"),
+ ice_arr_elem_idx(28, "25G_AUI_AOC_ACC"),
+ ice_arr_elem_idx(29, "25G_AUI_C2C"),
+ ice_arr_elem_idx(30, "40GBASE_CR4"),
+ ice_arr_elem_idx(31, "40GBASE_SR4"),
+ ice_arr_elem_idx(32, "40GBASE_LR4"),
+ ice_arr_elem_idx(33, "40GBASE_KR4"),
+ ice_arr_elem_idx(34, "40G_XLAUI_AOC_ACC"),
+ ice_arr_elem_idx(35, "40G_XLAUI"),
+ ice_arr_elem_idx(36, "50GBASE_CR2"),
+ ice_arr_elem_idx(37, "50GBASE_SR2"),
+ ice_arr_elem_idx(38, "50GBASE_LR2"),
+ ice_arr_elem_idx(39, "50GBASE_KR2"),
+ ice_arr_elem_idx(40, "50G_LAUI2_AOC_ACC"),
+ ice_arr_elem_idx(41, "50G_LAUI2"),
+ ice_arr_elem_idx(42, "50G_AUI2_AOC_ACC"),
+ ice_arr_elem_idx(43, "50G_AUI2"),
+ ice_arr_elem_idx(44, "50GBASE_CP"),
+ ice_arr_elem_idx(45, "50GBASE_SR"),
+ ice_arr_elem_idx(46, "50GBASE_FR"),
+ ice_arr_elem_idx(47, "50GBASE_LR"),
+ ice_arr_elem_idx(48, "50GBASE_KR_PAM4"),
+ ice_arr_elem_idx(49, "50G_AUI1_AOC_ACC"),
+ ice_arr_elem_idx(50, "50G_AUI1"),
+ ice_arr_elem_idx(51, "100GBASE_CR4"),
+ ice_arr_elem_idx(52, "100GBASE_SR4"),
+ ice_arr_elem_idx(53, "100GBASE_LR4"),
+ ice_arr_elem_idx(54, "100GBASE_KR4"),
+ ice_arr_elem_idx(55, "100G_CAUI4_AOC_ACC"),
+ ice_arr_elem_idx(56, "100G_CAUI4"),
+ ice_arr_elem_idx(57, "100G_AUI4_AOC_ACC"),
+ ice_arr_elem_idx(58, "100G_AUI4"),
+ ice_arr_elem_idx(59, "100GBASE_CR_PAM4"),
+ ice_arr_elem_idx(60, "100GBASE_KR_PAM4"),
+ ice_arr_elem_idx(61, "100GBASE_CP2"),
+ ice_arr_elem_idx(62, "100GBASE_SR2"),
+ ice_arr_elem_idx(63, "100GBASE_DR"),
+};
+
+static const char * const ice_link_mode_str_high[] = {
+ ice_arr_elem_idx(0, "100GBASE_KR2_PAM4"),
+ ice_arr_elem_idx(1, "100G_CAUI2_AOC_ACC"),
+ ice_arr_elem_idx(2, "100G_CAUI2"),
+ ice_arr_elem_idx(3, "100G_AUI2_AOC_ACC"),
+ ice_arr_elem_idx(4, "100G_AUI2"),
+};
/**
* dump_phy_type - helper function that prints PHY type strings
* @hw: pointer to the HW structure
@@ -81,6 +81,14 @@ ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,
*/
#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
+/* Define a macro for initializing array using indexes. Due to limitation
+ * of MSVC compiler it is necessary to allow other projects to replace
+ * that macro and strip the index from initialization.
+ * Linux driver is using coccinelle to maintain source sync with upstream
+ * and is not requiring this macro.
+ */
+#define ice_arr_elem_idx(idx, val) [(idx)] = (val)
+
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
u32 rxq_index);
@@ -1579,6 +1579,9 @@ ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
struct ice_fv *fv;
u32 offset;
+ if (!lkups->n_val_words)
+ return ICE_SUCCESS;
+
ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
if (!lkups->n_val_words || !hw->seg)
@@ -7,6 +7,7 @@
#include "ice_flex_type.h"
#include "ice_acl.h"
+#include "ice_parser.h"
#define ICE_IPV4_MAKE_PREFIX_MASK(prefix) ((u32)(~0) << (32 - (prefix)))
#define ICE_FLOW_PROF_ID_INVAL 0xfffffffffffffffful
@@ -162,7 +162,6 @@ struct ice_fltr_desc {
#define ICE_FXD_FLTR_QW1_FDID_PRI_S 25
#define ICE_FXD_FLTR_QW1_FDID_PRI_M (0x7ULL << ICE_FXD_FLTR_QW1_FDID_PRI_S)
-#define ICE_FXD_FLTR_QW1_FDID_PRI_ZERO 0x0ULL
#define ICE_FXD_FLTR_QW1_FDID_PRI_ONE 0x1ULL
#define ICE_FXD_FLTR_QW1_FDID_PRI_THREE 0x3ULL
@@ -7500,25 +7500,6 @@ ice_create_recipe_group(struct ice_hw *hw, struct ice_sw_recipe *rm,
return status;
}
-/**
- * ice_get_fv - get field vectors/extraction sequences for spec. lookup types
- * @hw: pointer to hardware structure
- * @lkups: lookup elements or match criteria for the advanced recipe, one
- * structure per protocol header
- * @bm: bitmap of field vectors to consider
- * @fv_list: pointer to a list that holds the returned field vectors
- */
-static enum ice_status
-ice_get_fv(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
- ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list)
-{
- if (!lkups->n_val_words)
- return ICE_SUCCESS;
-
- /* Find field vectors that include all specified protocol types */
- return ice_get_sw_fv_list(hw, lkups, bm, fv_list);
-}
-
/**
* ice_tun_type_match_word - determine if tun type needs a match mask
* @tun_type: tunnel type
@@ -7905,11 +7886,11 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
/* Get bitmap of field vectors (profiles) that are compatible with the
* rule request; only these will be searched in the subsequent call to
- * ice_get_fv.
+ * ice_get_sw_fv_list.
*/
ice_get_compat_fv_bitmap(hw, rinfo, fv_bitmap);
- status = ice_get_fv(hw, lkup_exts, fv_bitmap, &rm->fv_list);
+ status = ice_get_sw_fv_list(hw, lkup_exts, fv_bitmap, &rm->fv_list);
if (status)
goto err_unroll;
@@ -498,8 +498,7 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
bool res_shared, u16 *desc_id, struct ice_sq_cd *cd);
enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
-enum ice_status
-ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
+enum ice_status ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
void ice_rem_all_sw_rules_info(struct ice_hw *hw);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);